From: Richard Acayan <mailingradian@gmail.com>
To: Srinivas Kandagatla <srini@kernel.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>,
Konrad Dybcio <konradybcio@kernel.org>,
linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org
Cc: Nickolay Goppen <setotau@mainlining.org>,
Adam Skladowski <a39.skl@gmail.com>,
Vladimir Lypak <vladimir.lypak@gmail.com>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Wesley Cheng <quic_wcheng@quicinc.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Johan Hovold <johan@kernel.org>, Kees Cook <kees@kernel.org>,
Charles Keepax <ckeepax@opensource.cirrus.com>,
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>,
Richard Acayan <mailingradian@gmail.com>
Subject: [PATCH v3 06/15] ASoC: qdsp6: q6dsp-lpass-ports: add internal mi2s support
Date: Tue, 31 Mar 2026 15:39:30 -0400 [thread overview]
Message-ID: <20260331193939.40636-7-mailingradian@gmail.com> (raw)
In-Reply-To: <20260331193939.40636-1-mailingradian@gmail.com>
Add the internal MI2S stream capabilities as specified by the audio
kernel modules and configure the ports as MI2S ports.
Link: https://android.googlesource.com/kernel/msm-extra/+/530cffa4cc977a348753831b163eb9d3302b954a/asoc/msm-dai-q6-v2.c#4597
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
sound/soc/qcom/common.h | 2 +-
sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c | 200 +++++++++++++++++++++++
2 files changed, 201 insertions(+), 1 deletion(-)
diff --git a/sound/soc/qcom/common.h b/sound/soc/qcom/common.h
index ee6662885593..be693b53a4fa 100644
--- a/sound/soc/qcom/common.h
+++ b/sound/soc/qcom/common.h
@@ -7,7 +7,7 @@
#include <dt-bindings/sound/qcom,q6afe.h>
#include <sound/soc.h>
-#define LPASS_MAX_PORT (SENARY_MI2S_TX + 1)
+#define LPASS_MAX_PORT (INT6_MI2S_TX + 1)
int qcom_snd_parse_of(struct snd_soc_card *card);
int qcom_snd_wcd_jack_setup(struct snd_soc_pcm_runtime *rtd,
diff --git a/sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c b/sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c
index e5cd82f77b55..7006071f45a0 100644
--- a/sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c
+++ b/sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c
@@ -668,6 +668,205 @@ static struct snd_soc_dai_driver q6dsp_audio_fe_dais[] = {
Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_5),
Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_6),
Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_7),
+ {
+ .playback = {
+ .stream_name = "INT0 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
+ SNDRV_PCM_RATE_192000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 192000,
+ },
+ .id = INT0_MI2S_RX,
+ .name = "INT0_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT0 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT0_MI2S_TX,
+ .name = "INT0_MI2S_TX",
+ }, {
+ .playback = {
+ .stream_name = "INT1 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT1_MI2S_RX,
+ .name = "INT1_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT1 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT1_MI2S_TX,
+ .name = "INT1_MI2S_TX",
+ }, {
+ .playback = {
+ .stream_name = "INT2 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT2_MI2S_RX,
+ .name = "INT2_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT2 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT2_MI2S_TX,
+ .name = "INT2_MI2S_TX",
+ }, {
+ .playback = {
+ .stream_name = "INT3 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT3_MI2S_RX,
+ .name = "INT3_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT3 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT3_MI2S_TX,
+ .name = "INT3_MI2S_TX",
+ }, {
+ .playback = {
+ .stream_name = "INT4 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+ SNDRV_PCM_RATE_192000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 192000,
+ },
+ .id = INT4_MI2S_RX,
+ .name = "INT4_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT4 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT4_MI2S_TX,
+ .name = "INT4_MI2S_TX",
+ }, {
+ .playback = {
+ .stream_name = "INT5 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT5_MI2S_RX,
+ .name = "INT5_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT5 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT5_MI2S_TX,
+ .name = "INT5_MI2S_TX",
+ }, {
+ .playback = {
+ .stream_name = "INT6 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT6_MI2S_RX,
+ .name = "INT6_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT6 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT6_MI2S_TX,
+ .name = "INT6_MI2S_TX",
+ },
};
int q6dsp_audio_ports_of_xlate_dai_name(struct snd_soc_component *component,
@@ -712,6 +911,7 @@ struct snd_soc_dai_driver *q6dsp_audio_ports_set_config(struct device *dev,
case QUINARY_MI2S_RX ... QUINARY_MI2S_TX:
case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
case LPI_MI2S_RX_0 ... LPI_MI2S_TX_4:
+ case INT0_MI2S_RX ... INT6_MI2S_TX:
q6dsp_audio_fe_dais[i].ops = cfg->q6i2s_ops;
break;
case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
--
2.53.0
next prev parent reply other threads:[~2026-03-31 19:39 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-31 19:39 [PATCH v3 00/15] SDM660 sound card and internal MI2S support Richard Acayan
2026-03-31 19:39 ` [PATCH v3 01/15] ASoC: dt-bindings: qcom,sm8250: add compatible for sdm660 Richard Acayan
2026-03-31 19:39 ` [PATCH v3 02/15] ASoC: dt-bindings: qcom: q6dsp: add internal mi2s support Richard Acayan
2026-03-31 19:39 ` [PATCH v3 03/15] ASoC: dt-bindings: pm8916-wcd-analog-codec: Document pm8950/pm8953 Richard Acayan
2026-03-31 19:39 ` [PATCH v3 04/15] ASoC: dt-bindings: pm8916-analog-codec: Add PM660L compatible Richard Acayan
2026-03-31 19:39 ` [PATCH v3 05/15] ASoC: dt-bindings: msm8916-digital-codec: Add SDM660 compatible Richard Acayan
2026-03-31 19:39 ` Richard Acayan [this message]
2026-03-31 19:39 ` [PATCH v3 07/15] ASoC: qdsp6: q6afe: add internal mi2s support Richard Acayan
2026-03-31 19:39 ` [PATCH v3 08/15] ASoC: qdsp6: q6afe-dai: " Richard Acayan
2026-03-31 19:39 ` [PATCH v3 09/15] ASoC: qdsp6: q6routing: " Richard Acayan
2026-03-31 19:39 ` [PATCH v3 10/15] ASoC: qdsp6: common: support headphone jacks connected to internal mi2s Richard Acayan
2026-03-31 19:39 ` [PATCH v3 11/15] ASoC: qcom: sm8250: add support for INT0_MI2S_RX and INT3_MI2S_TX Richard Acayan
2026-03-31 19:39 ` [PATCH v3 12/15] ASoC: qcom: sm8250: add SDM660 compatible Richard Acayan
2026-03-31 19:39 ` [PATCH v3 13/15] ASoC: msm8916-wcd-analog: add pm8950 codec Richard Acayan
2026-03-31 19:39 ` [PATCH v3 14/15] ASoC: msm8916-wcd-analog: add pm8953 codec Richard Acayan
2026-03-31 19:39 ` [PATCH v3 15/15] ASoC: msm8916-wcd-analog: add quirk for cajon 2.0 Richard Acayan
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