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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82f0c50a8f7sm10232140b3a.56.2026.04.13.03.07.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Apr 2026 03:07:18 -0700 (PDT) From: phucduc.bui@gmail.com To: kuninori.morimoto.gx@renesas.com, broonie@kernel.org Cc: lgirdwood@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, perex@perex.cz, tiwai@suse.com, linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH v2 0/6] ASoC: renesas: fsi: Fix system hang by adding SPU clock Date: Mon, 13 Apr 2026 17:06:54 +0700 Message-ID: <20260413100700.30995-1-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: bui duc phuc Hi all, The FSI on r8a7740 requires the SPU clock to be enabled before accessing its internal registers. Without this clock, register access can lead to a system hang, even when the FSI functional clock is properly enabled. This series adds the missing clocks and aligns their names with those used in the driver. Following feedback from Morimoto-san, the driver is refactored to improve stability. Clock initialization is moved from the runtime path to the probe function to simplify the flow and avoid redundant setups. Additionally, the shutdown sequence is reordered to ensure the stream is properly stopped before the hardware is shut down. Changes in v2: - DT Bindings: Define "own" clock and add "spu", "icka/b", "diva/b", "xcka/b" to the clock tree. Use YAML anchors and "if" rules to enforce clock-names and r8a7740 requirements. Relocate allOf block and update example with full 8-clock configuration. - DTS: Rename "fsi" clock to "own" to match driver implementation. Add missing clock names: "icka", "ickb", "xcka", "xckb". - In the driver: Refactor clock initialization. Reorder shutdown: stop stream before hardware shutdown. Move SPU clock enable/disable handling to fsi_hw_startup/shutdown. v1 links : https://lore.kernel.org/all/20260403112655.167593-1-phucduc.bui@gmail.com/ Testing: - Verified on r8a7740 (Armadillo-800EVA): FSI slave / Codec master mode. - FSI master mode is currently compile-tested only. Full verification requires a dedicated HDMI driver (FSIB) or hardware modifications (resoldering board resistors) (FSIA).Full support for fsidiv requires additional DT bindings and a corresponding driver. bui duc phuc (6): ASoC: renesas: fsi: Add shared SPU clock support ASoC: renesas: fsi: Fix hang by enabling SPU clock ASoC: renesas: fsi: Fix trigger stop ordering ASoC: renesas: fsi: refactor clock initialization arm: dts: renesas: r8a7740: Add clocks for FSI ASoC: dt-bindings: renesas,fsi: add support for multiple clocks .../bindings/sound/renesas,fsi.yaml | 61 +++++- arch/arm/boot/dts/renesas/r8a7740.dtsi | 12 +- sound/soc/renesas/fsi.c | 181 ++++++++++-------- 3 files changed, 171 insertions(+), 83 deletions(-) -- 2.43.0