RE: [PATCH v2 02/24] clk: renesas: r9a09g047: Add audio clock and reset support

John Madieu
2026-04-09T16:12:44Z

Hi Geert,

Thanks for the review.

> -----Original Message-----
> From: Geert Uytterhoeven <geert@linux-m68k.org>
> Sent: Wednesday, April 8, 2026 11:38 AM
> To: John Madieu <john.madieu.xa@bp.renesas.com>
> Subject: Re: [PATCH v2 02/24] clk: renesas: r9a09g047: Add audio clock and
> reset support
>
> Hi John,
>
> On Thu, 2 Apr 2026 at 11:07, John Madieu <john.madieu.xa@bp.renesas.com>
> wrote:
> > Add clock and reset entries for audio-related modules on the RZ/G3E SoC.
> >
> > Target modules are:
> > - SSIU (Serial Sound Interface Unit) with SSI ch0-ch9
> > - SCU (Sampling Rate Converter Unit) with SRC ch0-ch9, DVC ch0-ch1,
> > CTU/MIX ch0-ch1
> > - ADMAC (Audio DMA Controller)
> > - ADG (Audio Clock Generator) with divider input clocks and audio
> > master clock outputs
> >
> > While at it, reorder plldty_div16 to group it with other plldty fixed
> > dividers.
> >
> > Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- a/drivers/clk/renesas/r9a09g047-cpg.c
> > +++ b/drivers/clk/renesas/r9a09g047-cpg.c
>
> > @@ -460,6 +483,96 @@ static const struct rzv2h_mod_clk
> r9a09g047_mod_clks[] __initconst = {
> > BUS_MSTOP(3, BIT(4))),
> > DEF_MOD("tsu_1_pclk", CLK_QEXTAL, 16, 10, 8,
> 10,
> > BUS_MSTOP(2,
> > BIT(15))),
> > + DEF_MOD("ssif_clk", CLK_PLLCLN_DIV8, 15, 5,
> 7, 21,
>
> Please preserve sort order (by _onindex, _onbit);

I'll address this in v3.

Regards,
John

>
> > + BUS_MSTOP(2, BIT(3) |
> BIT(4))),
> > + DEF_MOD("scu_clk", CLK_PLLCLN_DIV8, 15, 6,
> 7, 22,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("scu_clkx2", CLK_PLLCLN_DIV4, 15, 7,
> 7, 23,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("admac_clk", CLK_PLLCLN_DIV8, 15, 8,
> 7, 24,
> > + BUS_MSTOP(2, BIT(5))),
> > + DEF_MOD("adg_clks1", CLK_PLLCLN_DIV8, 15, 9,
> 7, 25,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_clk_200m", CLK_PLLCLN_DIV8, 15, 10,
> 7, 26,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_audio_clka", CLK_AUDIO_CLKA, 15, 11,
> 7, 27,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_audio_clkb", CLK_AUDIO_CLKB, 15, 12,
> 7, 28,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_audio_clkc", CLK_AUDIO_CLKC, 15, 13,
> 7, 29,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_ssi0_clk", CLK_PLLCLN_DIV8, 22, 0,
> -1, -1,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_ssi1_clk", CLK_PLLCLN_DIV8, 22, 1,
> -1, -1,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_ssi2_clk", CLK_PLLCLN_DIV8, 22, 2,
> -1, -1,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_ssi3_clk", CLK_PLLCLN_DIV8, 22, 3,
> -1, -1,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_ssi4_clk", CLK_PLLCLN_DIV8, 22, 4,
> -1, -1,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_ssi5_clk", CLK_PLLCLN_DIV8, 22, 5,
> -1, -1,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_ssi6_clk", CLK_PLLCLN_DIV8, 22, 6,
> -1, -1,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_ssi7_clk", CLK_PLLCLN_DIV8, 22, 7,
> -1, -1,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_ssi8_clk", CLK_PLLCLN_DIV8, 22, 8,
> -1, -1,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("adg_ssi9_clk", CLK_PLLCLN_DIV8, 22, 9,
> -1, -1,
> > + BUS_MSTOP(2, BIT(2))),
> > + DEF_MOD("dvc0_clk", CLK_PLLCLN_DIV8, 23, 0,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("dvc1_clk", CLK_PLLCLN_DIV8, 23, 1,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("ctu0_mix0_clk", CLK_PLLCLN_DIV8, 23, 2,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("ctu1_mix1_clk", CLK_PLLCLN_DIV8, 23, 3,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("src0_clk", CLK_PLLCLN_DIV8, 23, 4,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("src1_clk", CLK_PLLCLN_DIV8, 23, 5,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("src2_clk", CLK_PLLCLN_DIV8, 23, 6,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("src3_clk", CLK_PLLCLN_DIV8, 23, 7,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("src4_clk", CLK_PLLCLN_DIV8, 23, 8,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("src5_clk", CLK_PLLCLN_DIV8, 23, 9,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("src6_clk", CLK_PLLCLN_DIV8, 23, 10,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("src7_clk", CLK_PLLCLN_DIV8, 23, 11,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("src8_clk", CLK_PLLCLN_DIV8, 23, 12,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("src9_clk", CLK_PLLCLN_DIV8, 23, 13,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("scu_supply_clk", CLK_PLLCLN_DIV8, 23, 14,
> -1, -1,
> > + BUS_MSTOP(2, BIT(0) |
> BIT(1))),
> > + DEF_MOD("ssif_supply_clk", CLK_PLLCLN_DIV8, 24, 0,
> -1, -1,
> > + BUS_MSTOP(2, BIT(3) |
> BIT(4))),
> > + DEF_MOD("ssi0_clk", CLK_PLLCLN_DIV8, 24, 1,
> -1, -1,
> > + BUS_MSTOP(2, BIT(3) |
> BIT(4))),
> > + DEF_MOD("ssi1_clk", CLK_PLLCLN_DIV8, 24, 2,
> -1, -1,
> > + BUS_MSTOP(2, BIT(3) |
> BIT(4))),
> > + DEF_MOD("ssi2_clk", CLK_PLLCLN_DIV8, 24, 3,
> -1, -1,
> > + BUS_MSTOP(2, BIT(3) |
> BIT(4))),
> > + DEF_MOD("ssi3_clk", CLK_PLLCLN_DIV8, 24, 4,
> -1, -1,
> > + BUS_MSTOP(2, BIT(3) |
> BIT(4))),
> > + DEF_MOD("ssi4_clk", CLK_PLLCLN_DIV8, 24, 5,
> -1, -1,
> > + BUS_MSTOP(2, BIT(3) |
> BIT(4))),
> > + DEF_MOD("ssi5_clk", CLK_PLLCLN_DIV8, 24, 6,
> -1, -1,
> > + BUS_MSTOP(2, BIT(3) |
> BIT(4))),
> > + DEF_MOD("ssi6_clk", CLK_PLLCLN_DIV8, 24, 7,
> -1, -1,
> > + BUS_MSTOP(2, BIT(3) |
> BIT(4))),
> > + DEF_MOD("ssi7_clk", CLK_PLLCLN_DIV8, 24, 8,
> -1, -1,
> > + BUS_MSTOP(2, BIT(3) |
> BIT(4))),
> > + DEF_MOD("ssi8_clk", CLK_PLLCLN_DIV8, 24, 9,
> -1, -1,
> > + BUS_MSTOP(2, BIT(3) |
> BIT(4))),
> > + DEF_MOD("ssi9_clk", CLK_PLLCLN_DIV8, 24, 10,
> -1, -1,
> > + BUS_MSTOP(2, BIT(3) |
> > + BIT(4))),
> > };
> >
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker.
> But when I'm talking to journalists I just say "programmer" or something
> like that.
> -- Linus Torvalds