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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cdb70aa6ab9sm479228a12.27.2026.11.06.03.30.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Nov 2026 03:30:14 -0800 (PST) From: phucduc.bui@gmail.com To: Andrew Jackson , Mark Brown , Xingyu Wu Cc: Tim Bird , Yuri Zaporozhets , Kuninori Morimoto , Maxim Kochetkov , Liam Girdwood , Jaroslav Kysela , Takashi Iwai , linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH 0/5] Fix several issues in the DesignWare I2S driver Date: Fri, 6 Nov 2026 18:29:35 +0700 Message-ID: <20261106112940.53550-1-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: bui duc phuc Hi all, I've continued reviewing the DesignWare I2S driver and referred to the DesignWare APB I2S databook when looking into its clock configuration, channel limits, and FIFO handling. I couldn't access the document through the manufacturer's website due to regional restrictions, so I've found an externally hosted copy for convenience. The Synopsys product page is also included for reference. Databook: https://www.scribd.com/document/891940768/Designware-apb-i2s Manufacturer's website: https://www.synopsys.com/dw/ipdir.php?c=DW_apb_i2s Compile-tested only. Best regards, Phuc bui duc phuc (5): ASoC: dwc: Fix bit clock rate in TDM mode ASoC: dwc: Fix error handling in dw_i2s_set_fmt() ASoC: dwc: Fix channels_max derived from COMP_PARAM_1 ASoC: dwc: Fix DMA fifo_size calculation ASoC: dwc: Remove redundant error messages sound/soc/dwc/dwc-i2s.c | 53 ++++++++++++++++------------------------- 1 file changed, 21 insertions(+), 32 deletions(-) -- 2.43.0