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Wed, 15 Jul 2026 03:42:48 -0700 (PDT) X-Received: by 2002:a05:620a:404b:b0:92e:5ef1:9072 with SMTP id af79cd13be357-92ef2af8da7mr1347436085a.2.1784112168078; Wed, 15 Jul 2026 03:42:48 -0700 (PDT) Received: from [192.168.120.193] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c1687171464sm2801666b.19.2026.07.15.03.42.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 15 Jul 2026 03:42:46 -0700 (PDT) Message-ID: <53354eeb-21da-4a9d-868e-970a6c4331e5@oss.qualcomm.com> Date: Wed, 15 Jul 2026 12:42:43 +0200 Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] slimbus: qcom-ngd-ctrl: fix ngd register base address To: federico@izzo.pro, Srinivas Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht References: <20260710-qcom-ngd-register-base-fix-v2-1-0bb247c954c9@izzo.pro> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260710-qcom-ngd-register-base-fix-v2-1-0bb247c954c9@izzo.pro> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE1MDEwNCBTYWx0ZWRfXzyOnerF/IX2L +gHVGfkg94HrX+a4V2DJCjq2bLbexlp48Abfd26bHbWMsziSpHNYXdcP3HzJLJ7ryGxQgJJSliO 9+fcNseY1OtqckJLcdUA19yLeQxZxVYZtmdsJDJEwRwytcFiHLGdPfrRn3Z8234vAR12i4wHTH9 8PNVeG6jnOsTLh3PhAx2D5iyyKdhYbl744Y+q+0aE8yb+O8ENaY3keFl8J2XP4+TpVjuvYqXNvN tpvUPDAlUPDZDmvXXcWbd2dOIUz1kEPEzS4DjCEQ1FKdkbrpUxJtXQwf6+IIZiRBU47eGzO/Yii Vy5T5si6CgcdjTwBx+jmgSD0GqLZnLPyrkUuNM9rEVY2k9EaQUPNzqNHPIigqxigNv6HJhS7Phi RNVhKGj2WfqBKHE3FnaezZh7wm+9xhGqHpyWpbSn90hRZTVozUSXDCzyf3l6QSgn/Yz9Wwm9it8 QQ8mJ4d9dk0Wh3In2mQ== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE1MDEwNCBTYWx0ZWRfX67hE8ZDlmvXy oNQssjddH/czy4mhQf6bSljp9U0NPjKjzz5iNpmd39BOvjEcgXBcIbMpfx+fPcPopy/8yTliNHn 7nBjqrKE6ERXLfr++frGAoyXJq+nSUw= X-Authority-Analysis: v=2.4 cv=bKcm5v+Z c=1 sm=1 tr=0 ts=6a576429 cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=W2E--wPkvXKHDmt8G8wA:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-ORIG-GUID: TFsJloc0dVJU3Es7HxvBnInDoNCol7jM X-Proofpoint-GUID: TFsJloc0dVJU3Es7HxvBnInDoNCol7jM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-15_02,2026-07-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 bulkscore=0 clxscore=1015 adultscore=0 malwarescore=0 impostorscore=0 suspectscore=0 priorityscore=1501 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607150104 On 7/10/26 12:28 PM, Federico Amedeo Izzo via B4 Relay wrote: > From: Federico Amedeo Izzo > > The slimbus controller register base was calculated using the > controller ID and the register size, producing wrong results for ID > 1. > > The expression reduces to ngd->base = ctrl->base for controller with ID = 1; > but for ID > 1 the other factors produce a wrong base address. > This bug caused a crash while trying to bring-up the secondary > slimbus controller (ID = 3) on oneplus-enchilada with sdm845. SDM845 has 2 slimbus controllers: AUD_SLIM @ 0x171c0000 (the currently described node in sdm845.dtsi) QCA_SLIM @ 0x17240000 (the one you're trying to enable) Each one of these controllers has 2 NGDs (indexed 1 and 2), located at an offset of +0x1000 from the base of the controller and spaced 0x1000 apart from each other (i.e. the current calculation is right) You do however need to pass the right ID to the QMI message, so the bug is in this line: req.instance = (ctrl->ngd->id >> 1); This shouldn't be the same ID. Downstream solves this using a `cell-index` property, which represents the ordinal of the instance of a hw block, but that's highly discouraged in dt-bindings nowadays. Instead, the recommended way would be to introduce a struct like: { .base = 0x171c0000, .index = 1 }, { .base = 0x17240000, .index = 3 }, However that would further need a sdm845-specific compatible to bind the data to this specific SoC. I think we can introduce one without any regressions (because the other slimbus controller is not yet described) Konrad