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Fri, 27 Mar 2026 12:11:29 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id mNcoIfFzxmmJRAAAD6G6ig (envelope-from ); Fri, 27 Mar 2026 12:11:29 +0000 Date: Fri, 27 Mar 2026 13:11:29 +0100 Message-ID: <87ikahqxou.wl-tiwai@suse.de> From: Takashi Iwai To: Fu Hao Cc: perex@perex.cz, tiwai@suse.com, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org Subject: Re: [PATCH 7/8] ALSA: hda: Fix single byte writing issue for Hygon family 18h model 5h In-Reply-To: References: User-Agent: Wanderlust/2.15.9 (Almost Unreal) Emacs/30.2 Mule/6.0 Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-Spamd-Result: default: False [-3.51 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; RCVD_TLS_ALL(0.00)[]; RCPT_COUNT_FIVE(0.00)[5]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:106:10:150:64:167:received]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:dkim,suse.de:mid,imap1.dmz-prg2.suse.org:helo,imap1.dmz-prg2.suse.org:rdns]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; DKIM_TRACE(0.00)[suse.de:+] X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Score: -3.51 X-Spam-Level: X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Rspamd-Queue-Id: C77004D315 On Fri, 27 Mar 2026 09:11:13 +0100, Fu Hao wrote: > > On Hygon family 18h model 5h controller, some registers such as > GCTL, SD_CTL and SD_CTL_3B should be accessed in dword, or the > writing will fail. > > Signed-off-by: Fu Hao > --- > include/sound/hdaudio.h | 1 + > sound/hda/controllers/intel.c | 4 ++++ > sound/hda/core/controller.c | 10 +++++++-- > sound/hda/core/stream.c | 42 ++++++++++++++++++++++++++--------- > 4 files changed, 45 insertions(+), 12 deletions(-) > > diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h > index f11bfc6b9..57a144fec 100644 > --- a/include/sound/hdaudio.h > +++ b/include/sound/hdaudio.h > @@ -352,6 +352,7 @@ struct hdac_bus { > bool not_use_interrupts:1; /* prohibiting the RIRB IRQ */ > bool access_sdnctl_in_dword:1; /* accessing the sdnctl register by dword */ > bool use_pio_for_commands:1; /* Use PIO instead of CORB for commands */ > + bool hygon_dword_access:1; > > int poll_count; > I hesitate to add another flag just for this platform. And looking at the changes, all appear to be about the dword access for sdnctl writes. So I believe we can simply extend access_sdnctl_in_dword to do the dword access in each write access, instead? The performance shouldn't matter as it's no hot path. Alternatively, you can enable bus->aligned_mmio flag, but this needs to enable CONFIG_SND_HDA_ALIGNED_MMIO. That's a visible cost for other platforms, though. thanks, Takashi