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Thu, 15 May 2025 14:45:52 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id qYSGISD+JWgZOAAAD6G6ig (envelope-from ); Thu, 15 May 2025 14:45:52 +0000 Date: Thu, 15 May 2025 16:45:52 +0200 Message-ID: <87r00qx78f.wl-tiwai@suse.de> From: Takashi Iwai To: Daniel Dadap Cc: alsa-devel@alsa-project.org, linux-sound@vger.kernel.org Subject: Re: [PATCH] ALSA: hda - Add new driver for HDA controllers listed via ACPI In-Reply-To: References: User-Agent: Wanderlust/2.15.9 (Almost Unreal) Emacs/27.2 Mule/6.0 Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Rspamd-Queue-Id: B035B211AB X-Spam-Flag: NO X-Spam-Score: -3.51 X-Spam-Level: X-Spamd-Result: default: False [-3.51 / 50.00]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; MIME_TRACE(0.00)[0:+]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:106:10:150:64:167:received]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; TO_DN_SOME(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; ARC_NA(0.00)[]; RCVD_TLS_ALL(0.00)[]; RCPT_COUNT_THREE(0.00)[3]; RCVD_COUNT_TWO(0.00)[2]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; FUZZY_BLOCKED(0.00)[rspamd.com]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:mid,suse.de:dkim,nvidia.com:email,imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DNSWL_BLOCKED(0.00)[2a07:de40:b281:106:10:150:64:167:received,2a07:de40:b281:104:10:150:64:97:from]; DKIM_TRACE(0.00)[suse.de:+] X-Rspamd-Action: no action On Thu, 15 May 2025 15:31:46 +0200, Daniel Dadap wrote: > > Some systems expose HD-Audio controllers via objects in the ACPI tables > which encapsulate the controller's interrupt and the base address for the > HDA registers in an ACPI _CRS object, for example, as listed in this ACPI > table dump excerpt: > > Device (HDA0) > { > Name (_HID, "NVDA2014") // _HID: Hardware ID > ... > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > Memory32Fixed (ReadWrite, > 0x36078000, // Address Base > 0x00008000, // Address Length > ) > Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) > { > 0x0000021E, > } > }) > } > > Add support for HDA controllers discovered through ACPI, including support > for some platforms which expose such HDA controllers on NVIDIA SoCs. This > is done with a new driver which uses existing infrastructure for extracting > resource information from _CRS objects and plumbs the parsed resource > information through to the existing HDA infrastructure to enable HD-Audio > functionality on such devices. > > Although this driver is in the sound/pci/hda/ directory, it targets devices > which are not actually enumerated on the PCI bus. This is because it depends > upon the Intel "Azalia" infrastructure which has traditionally been used for > PCI-based devices. > > Signed-off-by: Daniel Dadap Thanks for the patch. The code looks fine. Just a nitpicking: > +static int __maybe_unused hda_acpi_suspend(struct device *dev) .... > +static int __maybe_unused hda_acpi_resume(struct device *dev) The __maybe_unused is superfluous when you set up SYSTEM_SLEEP_PM_OPS() macro instead in the below: > +static const struct dev_pm_ops hda_acpi_pm = { > + SET_SYSTEM_SLEEP_PM_OPS(hda_acpi_suspend, hda_acpi_resume) thanks, Takashi