Re: [RFC PATCH v1] ASoC: wm8904: enable fll with fixed mclk

[Andrejs Cainikovs <andrejs.cainikovs@toradex.com>]

On Mon, Mar 11, 2024 at 11:35:53AM +0000, Charles Keepax wrote:
> On Fri, Mar 08, 2024 at 04:58:31PM +0100, Andrejs Cainikovs wrote:
> > From: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> > 
> > Dear all,
> > 
> > This is an attempt to change wm8904 for a scenario when reference clock
> > supposed to be fixed to a particular frequency, but is not configured as
> > a fixed-clock. While this change is working fine, I'm struggling to
> > finalize it, not being able to find a proper solution of adding a check
> > whether we want to use fixed MCLK with codec's FLL or not. I could, of
> > course, introduce a new device tree property, but do not feel this would
> > be a proper way forward. Hence, I'm sending out this RFC patch to gather
> > your valuable feedback.
> > 
> > DUT: Dahlia carrier board with Verdin TI AM62 SOM.
> > Audio card configuration can be found in ti/k3-am62-verdin-dahlia.dtsi.
> 
> At some point one really starts to question if this is really a
> "simple card" any more.
> 
> > On systems with a fixed reference clock output rate it
> > is impossible to use this clock for all audio frequencies.
> > 
> > Following is an example of playing a 44100Hz audio on a system
> > with a fixed 25MHz reference clock applied to wm8904 codec,
> > in combination with simple-audio-card without mclk-fs:
> > 
> > [   27.013564] wm8904 1-001a: Target BCLK is 1411200Hz
> > [   27.013601] wm8904 1-001a: Using 25000000Hz MCLK
> > [   27.013611] wm8904 1-001a: CLK_SYS is 12500000Hz
> > [   27.013654] wm8904 1-001a: Selected CLK_SYS_RATIO of 256
> > [   27.013663] wm8904 1-001a: Selected SAMPLE_RATE of 44100Hz
> > [   27.013671] wm8904 1-001a: Selected BCLK_DIV of 80 for 1562500Hz BCLK
> > [   27.013680] wm8904 1-001a: LRCLK_RATE is 35
> > 
> > This leads to a distorted sound and this configuration is unusable.
> > 
> > On the other hand, configuring simple-audio-card with mclk-fs will
> > force the system to change MCLK frequency, which supposed to be fixed.
> > 
> > This change forces to use wm8904 FLL while keeping SoC's MCLK
> > frequency intact:
> > 
> > [  234.108149] wm8904 1-001a: Target BCLK is 1411200Hz
> > [  234.108304] wm8904 1-001a: Using 0Hz FLL clock
> > [  234.108722] wm8904 1-001a: FLL configured for 25000000Hz->1411200Hz
> > [  234.108794] wm8904 1-001a: CLK_SYS is 1411200Hz
> > [  234.108835] wm8904 1-001a: Selected CLK_SYS_RATIO of 64
> > [  234.108875] wm8904 1-001a: Selected SAMPLE_RATE of 44100Hz
> > [  234.108913] wm8904 1-001a: Selected BCLK_DIV of 10 for 1411200Hz BCLK
> > [  234.108955] wm8904 1-001a: LRCLK_RATE is 32
> > 

Charles,

With or without mclk-fs wm8904_set_sysclk() is called always during probe,
with following parameters:

clk_id = 0
dir = 0
freq = 25000000
mclk_freq = 25000000

When mclk-fs is set, wm8904_set_sysclk() is also called before each
playback [1]. In case of 44.1kHz:

clk_id = 0
dir = 0
freq = 11289600
mclk_freq = 11235955

In both scenarios, clk_id is always WM8904_CLK_AUTO.

[1]: https://elixir.bootlin.com/linux/latest/source/sound/soc/generic/simple-card-utils.c#L441

Best regards,
Andrejs

> Hmm... the driver already provides an option to automatically
> configure the clock. Is the issue here that in your fail case the
> machine driver never calls wm8904_set_sysclk? Or if it does call
> it, when and what parameters is it passing?
> 
> Thanks,
> Charles