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X-OriginatorOrg: opensource.cirrus.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2025 12:56:19.7233 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2985be10-16c7-4c88-7188-08ddeed71b51 X-MS-Exchange-CrossTenant-Id: bec09025-e5bc-40d1-a355-8e955c307de8 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=bec09025-e5bc-40d1-a355-8e955c307de8;Ip=[84.19.233.75];Helo=[edirelay1.ad.cirrus.com] X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TreatMessagesAsInternal-SN1PEPF00036F40.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS2PR19MB9649 X-Authority-Analysis: v=2.4 cv=DMuP4zNb c=1 sm=1 tr=0 ts=68bed278 cx=c_pps a=MZF0P0Qrwq9/sBmlUe3NwQ==:117 a=h1hSm8JtM9GN1ddwPAif2w==:17 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=z/mQ4Ysz8XfWz/Q5cLBRGdckG28=:19 a=wKuvFiaSGQ0qltdbU6+NXLB8nM8=:19 a=Ol13hO9ccFRV9qXi2t6ftBPywas=:19 a=kj9zAlcOel0A:10 a=yJojWOMRYYMA:10 a=s63m1ICgrNkA:10 a=RWc_ulEos4gA:10 a=2OTKQoomgfnlX5krLm4A:9 a=CjuIK1q_8ugA:10 X-Proofpoint-GUID: PfQ-0_Hkrxul8boOeUjC3dYFB7pOWFI3 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTA4MDEyOSBTYWx0ZWRfX/KdXzYks1XHa LUHF6SW9TTjrsuKN/dtOZaK1wwP0ObVODpgyFuACWaGOTVojJAoxXVLg4/FzO7gViE05Ad6DPgC VFmUCAuaO51trj0HWoFt9wMEshvomN7rx2ikIkvxjsMUn1MaVhvBhkZlXYoOhZPPSNDiuLWsXuj rUyvnjirL9DeT4DpWNwhIO0i9gdJVq7v5CWmPojVA9ToTzbBRWgKegIQ29ujbnlTIRnUZypv1JF WIKtqkRcgaKm9UoCpMEdB1PaUPmFrH6DwwiFcUrFYry2LS2w59HOKFK6Gzzydabw7+ElQmgAi6i D9qtyCeDr0JJM5ziUOU3blasUjjmYeKLWJSiRzAjdphS4WjCWqEnk0PJ/oejuo= X-Proofpoint-ORIG-GUID: PfQ-0_Hkrxul8boOeUjC3dYFB7pOWFI3 X-Proofpoint-Spam-Reason: safe On Mon, Sep 08, 2025 at 01:49:43PM +0200, Pierre-Louis Bossart wrote: > On 9/5/25 16:31, Charles Keepax wrote: > > Store a copy of the device register map in the structure for the IRQ > > handlers. This will allow the individual IRQ handlers access to the > > device level register map if required. > > Sorry, not following how you plan on sharing access to regmap between > parent and child devices. They all have a pointer to the device level register map, if some function or the device level is using it the regmap lock will be held and the others are block. > > > > @@ -445,6 +445,9 @@ struct sdca_interrupt_info *sdca_irq_allocate(struct device *dev, > > > > info->irq_chip = sdca_irq_chip; > > > > + for (i = 0; i < ARRAY_SIZE(info->irqs); i++) > > + info->irqs[i].device_regmap = regmap; > > + > > Lost on this one as well. A child device could support multiple > interrupts, e.g. for buttons and jack, not sure why each interrupt > needs a separate pointer to the same identical information. Most IRQs don't need custom handling so the core can handle those IRQs. In the case of custom IRQs the driver would register some private data structure that would contain necessary information for the handler such as regmaps. This array of interrupt structures is basically that private data. A pointer to this structure will be passed to the IRQ when it fires and it needs to contain all the stuff the IRQ handler needs, one of those things might be the device level register map. Thanks, Charles