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As a result, selecting MCLK2 as the AIF1 clock > source sets and reads back the rate of MCLK1 instead, and the rate > of MCLK1 is then stored as the MCLK2 rate. > > On the Exynos4412 Trats2 board, where MCLK1 is a fixed 24MHz clock and > MCLK2 a 32768Hz clock used when the codec is idle, this gives: > > wm8994-codec wm8994-codec: AIF1 using MCLK2 at 24000000Hz > > so the driver assumes a 12MHz SYSCLK while it actually runs at 32kHz. > This skips the 128fs AIF clock ratio setup for low SYSCLK rates and > makes the mic detection rate configuration use the wrong clock rate. > > Pass the MCLK index matching the selected clock source instead. > > Fixes: 419e2f508336 ("ASoC: wm8994: Add support for setting MCLK clock rate") > Signed-off-by: Marek Szyprowski > --- Reviewed-by: Charles Keepax Thanks, Charles