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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: GlknIdSalkIIeKedJNAMmlpoIAF2xwz29PjivVUMOE2++f0KwjZ4LpTVO/03QVC+X2Nd4vmtZ8ceqxKMX9FSVB3UeESbnsY2V+ItuNpXSUJqZSyFqO6ErLezQCLD4IWLrX6dQXH27GhjbWw0Ew2cdV71XpwX1Prq9kZzOxzeWdCLonVUqbUeuQBjq5C35Q/4Y+UDEQ73d56KZB6IMI4eKR6x+iy5hP74JCPeml6zLO5gE4I2XAlXfrVBpPNkGtwG1HPZ2OU37GbzwlFihz1Fe1iTfBTqfSSYe9/jIOPa5wlMHAWMWEF2uYNmqHheX+JyghRPGDmwV4Ohy1yGsZ5YBjGdFdVCPpd2fozvxMJB4LWOHlLIY8BHI5/T9YrxaZh9dlozrRjgDikReInj+yvfhzGwZ/Q65r9LmxCkPhqLHjSKZsYWbrmGxHrnTlJXBPmZ X-Exchange-RoutingPolicyChecked: 5b6EDw0mvMqK3W4ipNzApsHc8PVo5cHYgk3lT3oiVyCfBAJpspzFwZ3DgLpEvhHfZa01EJKySP5tAVRUnuY1CgLVDF8z+qdfOXpCtQNwlBBrznUmby0Iac7KQHCW+wv6IvHYi/tEPQphkBE2M5qIpb5ozaJnGlrDVulHgpvEFMliqNee7iHelsUTnlXRmq2gY4UBCvtCUhK4WcbWz3BOUvMdzKzQCgguBPwCOkFly1L7JdzibpMhW4strAUgJZRgNqpEkfNg9PFfiTXd4NeSU80La1gr6+2YL7htrZpEx3puf1g7k50lsTzmyyJbzgDa3gbXJEYJ0AhLrTSzPdkDww== X-OriginatorOrg: opensource.cirrus.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Oct 2026 09:38:03.6887 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a0d539a1-0d96-45f4-86d3-08df30202bae X-MS-Exchange-CrossTenant-Id: bec09025-e5bc-40d1-a355-8e955c307de8 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=bec09025-e5bc-40d1-a355-8e955c307de8;Ip=[84.19.233.75];Helo=[edirelay1.ad.cirrus.com] X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TreatMessagesAsInternal-CY6PEPF00000049.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR19MB4173 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIyMDAzNyBTYWx0ZWRfXz/5EAHrbQpzS HVSM8ysVnt68X9WMTttzfnwMohn6kd3KIHBoNtx4FrVwmgBWFTLsrPGfYJp+RtYpoQd7PuBSeEk 2miasEbDA5Icuip7u8wPm6mDISg3upw= X-Authority-Analysis: v=2.4 cv=Er5HPicA c=1 sm=1 tr=0 ts=6ad9d982 cx=c_pps a=o5n9MpPAMAXLgzyrJXPTXg==:117 a=h1hSm8JtM9GN1ddwPAif2w==:17 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=z/mQ4Ysz8XfWz/Q5cLBRGdckG28=:19 a=kj9zAlcOel0A:10 a=660iZSQnnn4A:10 a=s63m1ICgrNkA:10 a=RWc_ulEos4gA:10 a=VkNPw1HP01LnGYTKEx00:22 a=iX4cTi3TZMoOKdANLEfx:22 a=Dj2-6B8FqX4mGL0U3gbX:22 a=hD80L64hAAAA:8 a=w1d2syhTAAAA:8 a=92EV-Td5O-lQIe5qmq4A:9 a=CjuIK1q_8ugA:10 X-Proofpoint-ORIG-GUID: wRsLYUGA4-Mal_v9be_hdMXkPHedb_3t X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIyMDAzNyBTYWx0ZWRfXza8yJImCXuF/ DNDpLWJUTIiL0KVFcs3P7aYhbAbIvp8nRaCPG/DJ7LIiSbk7vWaH5nqecDFtYrEeOTtDOqGoW1j FGoU5cqhzUgEGN+dEXd4JEO6BlzUmQq0fiPQEtd0qZ95mT5zcwmEzHK96wxcxkfb+NoI2xy0PcQ pPO1AVsFM1irSCn7rZS8GN+frIJX1LHkLmTb5KnXazRFBDi4ZCru3q6tg6H56wJIuBx6YvjV5s6 Pem7oxAr+1vzxbadl0KkN/uv0kfkYI/PKy8ufBTdv8Fex8oJGAhA9YARHzh17ybx4t+XqcLUGWD Ythk/rWh9aE5mul+cbNnt28asAnXMLAD5wT7fp0V4PFJ//EEUnxDWOa60bfTBjyZoXhP28xBQbZ al8wIqaPITkOjU9PA3jJMLD1qDnN6nk6nYddBtmutK+KyT4wHRxUIQr0K6NjVUB4OF9xiO93fd2 rt1s8umipZoB6/HeXrg== X-Proofpoint-GUID: wRsLYUGA4-Mal_v9be_hdMXkPHedb_3t X-Proofpoint-Spam-Reason: safe On Thu, Oct 22, 2026 at 09:47:39AM +0200, Marek Szyprowski wrote: > aif_mclk_set() masks the AIFnCLK_SRC field of the AIFn clocking > register, but compares the result with unshifted field values. The > MCLK2 source (0x08) therefore never matches, so MCLK2 is never enabled > for an AIF clocked from it, and the AIF relies on other users of that > clock to keep it running. > > On the Exynos4412 Trats2 board, AIF1 and SYSCLK run from MCLK2, the > 32768Hz PMIC clock, while the codec is idle. That clock is shared with > the WLAN and Bluetooth chips, which enable it only once their drivers > are loaded. Until then the codec runs from a stopped clock: FLL1 fails > to lock when configured from that state, and the codec floods the > kernel log with FIFO error interrupts once a digital path is powered > up: > > wm8994-codec wm8994-codec: Timed out waiting for FLL lock > wm8994-codec wm8994-codec: FIFO error > > Booting with clk_ignore_unused, which keeps that clock running from > the bootloader, makes both issues disappear. > > Fixing just the comparison is not enough. The AIF clock source can > be changed by configure_aif_clock() while the AIF clock is running, > for example the Midas machine driver switches AIF1 between MCLK2 and > FLL1 while AIF1CLK is kept enabled for jack detection. The MCLK > selected this way is never enabled, and looking up the clock again on > disable can release a different MCLK than the one enabled, leaking the > enable count of one clock and underflowing the other. > > Shift the field value before decoding it, and remember which MCLK has > been enabled for each AIF, so that the same clock is released on > disable. When the AIF clock source is changed while the AIF clock is > running, enable the new MCLK before switching to it and release the > previous one afterwards. While at it, report the MCLK number 1-based > in the error message. > > Fixes: 001b83d395ab ("ASoC: wm8994: Add support for MCLKn clock gating") > Signed-off-by: Marek Szyprowski > --- Reviewed-by: Charles Keepax Thanks, Charles