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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE4MDE5NCBTYWx0ZWRfX9XarEhheFUIZ CFrJdevHWL8d2Ls+1Jmc5cjuT32Z4g+12WfMd36WULX2ISZRLdKN2JZT18r59y6t7TsXQCPJ+ag 4IdVV1c/3+xfKbJm8TSXoCDScq3BuBQ= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE4MDE5NCBTYWx0ZWRfX8oR2PnIqMTiq gNzaGYoTQkNpU3wz2/i2TghVta6KTYOFuovP4mosfKuMb5uGfVv1uURxrAJnRNFd3lE0NrJCiDu RpkdT0J4ebynHnrWXoAZtAhTIm/ICju/q4SQgsJTMzRzw63wyGnXrLp+3ot5ElWK+nnOCoXhPxr 8aTXy5bu1GiXaaifrHveSrzWogtbRiQtC9O6j91bdjD07guPk1FXoJsp6XNiIecTbZmetNvxT2y Lfzph7FudtGiGhD9TtMcLZTGo+ntsG0v2lzcg4+UoKYzbSmcC8A3nUn30t1Zjs98abNBu4XmlU2 lZtafmwVU6xsgxGhr7zQBPGkhFBfyPBC2mbZoyRlDdN+D7W87LO69IGUjo0tlACliq8d/MoUWit f2wHVBeMpRS4vydOC0FJ0rpaTmAvnXPrRGD43BRwrTkgsxQsvLz/qaOJehABC7gaW2JtHcBUKkq 0Sbye4CG0/cWxrsCnGw== X-Proofpoint-ORIG-GUID: A8hvm0kQcgxL9knsO0uobHiLh4s05kA1 X-Authority-Analysis: v=2.4 cv=I7zw19gg c=1 sm=1 tr=0 ts=6aad401f cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=cBTdkrXCvdqGFug1r-QA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-GUID: A8hvm0kQcgxL9knsO0uobHiLh4s05kA1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-18_04,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 clxscore=1015 impostorscore=0 priorityscore=1501 adultscore=0 phishscore=0 malwarescore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609180194 On 9/11/2026 2:47 PM, Harendra Gautam wrote: > Add the Devicetree binding for the Qualcomm Audio Interface (QAIF) CPU DAI > controller used on the Shikra audio platform, together with a dt-bindings > header for QAIF DAI and AIF interface IDs. > index 3a99703dbc4a..f08c20c84c60 100644 > --- a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h > +++ b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h Please drop this DAI ID change from this series. I have posted a separate series for these DAI ID additions since they are required by other Qualcomm platforms as well. https://lore.kernel.org/all/20260918-qaif_dai_id_support-v1-0-ed863c0e5e45@oss.qualcomm.com/ Keeping them separate avoids blocking those board enablements and allows this series to remain focused on the Shikra-specific changes. Best Regards, Rafi. > @@ -156,6 +156,58 @@ > #define LPI_MI2S_TX_5 150 > #define LPI_MI2S_RX_6 151 > #define LPI_MI2S_TX_6 152 > +#define AIF_MI2S_RX_0 153 > +#define AIF_MI2S_RX_1 154 > +#define AIF_MI2S_RX_2 155 > +#define AIF_MI2S_RX_3 156 > +#define AIF_MI2S_RX_4 157 > +#define AIF_MI2S_RX_5 158 > +#define AIF_MI2S_RX_6 159 > +#define AIF_MI2S_RX_7 160 > +#define AIF_MI2S_RX_8 161 > +#define AIF_MI2S_RX_9 162 > +#define AIF_MI2S_RX_10 163 > +#define AIF_MI2S_RX_11 164 > +#define AIF_MI2S_RX_12 165 > +#define AIF_MI2S_TX_0 166 > +#define AIF_MI2S_TX_1 167 > +#define AIF_MI2S_TX_2 168 > +#define AIF_MI2S_TX_3 169 > +#define AIF_MI2S_TX_4 170 > +#define AIF_MI2S_TX_5 171 > +#define AIF_MI2S_TX_6 172 > +#define AIF_MI2S_TX_7 173 > +#define AIF_MI2S_TX_8 174 > +#define AIF_MI2S_TX_9 175 > +#define AIF_MI2S_TX_10 176 > +#define AIF_MI2S_TX_11 177 > +#define AIF_MI2S_TX_12 178 > +#define AIF_TDM_RX_0 179 > +#define AIF_TDM_RX_1 180 > +#define AIF_TDM_RX_2 181 > +#define AIF_TDM_RX_3 182 > +#define AIF_TDM_RX_4 183 > +#define AIF_TDM_RX_5 184 > +#define AIF_TDM_RX_6 185 > +#define AIF_TDM_RX_7 186 > +#define AIF_TDM_RX_8 187 > +#define AIF_TDM_RX_9 188 > +#define AIF_TDM_RX_10 189 > +#define AIF_TDM_RX_11 190 > +#define AIF_TDM_RX_12 191 > +#define AIF_TDM_TX_0 192 > +#define AIF_TDM_TX_1 193 > +#define AIF_TDM_TX_2 194 > +#define AIF_TDM_TX_3 195 > +#define AIF_TDM_TX_4 196 > +#define AIF_TDM_TX_5 197 > +#define AIF_TDM_TX_6 198 > +#define AIF_TDM_TX_7 199 > +#define AIF_TDM_TX_8 200 > +#define AIF_TDM_TX_9 201 > +#define AIF_TDM_TX_10 202 > +#define AIF_TDM_TX_11 203 > +#define AIF_TDM_TX_12 204 > > #define LPASS_CLK_ID_PRI_MI2S_IBIT 1 > #define LPASS_CLK_ID_PRI_MI2S_EBIT 2 >