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[2001:999:700:7c7d:ca87:d71e:154f:6316]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-59e074889fasm3676714e87.30.2026.02.02.08.41.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 02 Feb 2026 08:41:08 -0800 (PST) Message-ID: Date: Mon, 2 Feb 2026 18:42:20 +0200 Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] ASoC: ti: davinci-mcasp: Disambiguate mcasp_is_synchronous function To: Sen Wang , broonie@kernel.org, lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260130051045.1898892-1-sen@ti.com> <20260130051045.1898892-3-sen@ti.com> From: =?UTF-8?Q?P=C3=A9ter_Ujfalusi?= Content-Language: en-US In-Reply-To: <20260130051045.1898892-3-sen@ti.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 30/01/2026 07:10, Sen Wang wrote: > The current mcasp_is_synchronous() function does more than what it > proclaims, it also checks if McASP is a frame producer. True, the naming was not too precise. It is tasked to decide if the TX clock needs to be enabled for RX operation, which precisely when McASP is in synchronous mode _and_ it is clock provider. > Therefore split the original function into two separate ones and > replace all occurrences with the new equivalent logic. So the functions > can be re-used when checking async/sync status in light of async mode > enhancements. Acked-by: Peter Ujfalusi > > Signed-off-by: Sen Wang > --- > sound/soc/ti/davinci-mcasp.c | 21 ++++++++++++++------- > 1 file changed, 14 insertions(+), 7 deletions(-) > > diff --git a/sound/soc/ti/davinci-mcasp.c b/sound/soc/ti/davinci-mcasp.c > index 621a9d5f9377..aa14fc1c8011 100644 > --- a/sound/soc/ti/davinci-mcasp.c > +++ b/sound/soc/ti/davinci-mcasp.c > @@ -179,10 +179,16 @@ static void mcasp_set_ctl_reg(struct davinci_mcasp *mcasp, u32 ctl_reg, u32 val) > > static bool mcasp_is_synchronous(struct davinci_mcasp *mcasp) > { > - u32 rxfmctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG); > u32 aclkxctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKXCTL_REG); > > - return !(aclkxctl & TX_ASYNC) && rxfmctl & AFSRE; > + return !(aclkxctl & TX_ASYNC); > +} > + > +static bool mcasp_is_frame_producer(struct davinci_mcasp *mcasp) > +{ > + u32 rxfmctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG); > + > + return rxfmctl & AFSRE; > } > > static inline void mcasp_set_clk_pdir(struct davinci_mcasp *mcasp, bool enable) > @@ -226,7 +232,7 @@ static void mcasp_start_rx(struct davinci_mcasp *mcasp) > * synchronously from the transmit clock and frame sync. We need to make > * sure that the TX signlas are enabled when starting reception. > */ > - if (mcasp_is_synchronous(mcasp)) { > + if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp)) { > mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST); > mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST); > mcasp_set_clk_pdir(mcasp, true); > @@ -239,7 +245,7 @@ static void mcasp_start_rx(struct davinci_mcasp *mcasp) > mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); > /* Release Frame Sync generator */ > mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); > - if (mcasp_is_synchronous(mcasp)) > + if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp)) > mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXFSRST); > > /* enable receive IRQs */ > @@ -305,7 +311,7 @@ static void mcasp_stop_rx(struct davinci_mcasp *mcasp) > * In synchronous mode stop the TX clocks if no other stream is > * running > */ > - if (mcasp_is_synchronous(mcasp) && !mcasp->streams) { > + if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp) && !mcasp->streams) { > mcasp_set_clk_pdir(mcasp, false); > mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, 0); > } > @@ -332,7 +338,7 @@ static void mcasp_stop_tx(struct davinci_mcasp *mcasp) > * In synchronous mode keep TX clocks running if the capture stream is > * still running. > */ > - if (mcasp_is_synchronous(mcasp) && mcasp->streams) > + if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp) && mcasp->streams) > val = TXHCLKRST | TXCLKRST | TXFSRST; > else > mcasp_set_clk_pdir(mcasp, false); > @@ -1041,7 +1047,8 @@ static int mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream, > * not running already we need to configure the TX slots in > * order to have correct FSX on the bus > */ > - if (mcasp_is_synchronous(mcasp) && !mcasp->channels) > + if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp) && > + !mcasp->channels) > mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, > FSXMOD(total_slots), FSXMOD(0x1FF)); > } -- Péter