Re: [PATCH 3/4] ASoC: ti: davinci-mcasp: Streamline pdir behavior across rx & tx streams

["Péter Ujfalusi" <peter.ujfalusi@gmail.com>]

On 30/01/2026 07:10, Sen Wang wrote:
> Simplify the mcasp_set_clk_pdir caller convention in start/stop stream
> function, to make it so that set_clk_pdir gets called regardless when
> stream starts and also disables when stream ends.
> 
> Functionality-wise, everything remains the same as the previously skipped
> calls are now either correctly configured
> (when McASP is SND_SOC_DAIFMT_BP_FC - pdir needs to be enabled)
> or called with a bitmask of zero (when McASP is SND_SOC_DAIFMT_BC_FC - pdir
> gets disabled).
> 
> On brief regarding McASP Clock and Frame sync configurations, refer to [0].
> 
> [0]:TRM Section 12.1.1.4.2 https://www.ti.com/lit/ug/sprujd4a/sprujd4a.pdf
> 
> Signed-off-by: Sen Wang <sen@ti.com>
> ---
>  sound/soc/ti/davinci-mcasp.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/sound/soc/ti/davinci-mcasp.c b/sound/soc/ti/davinci-mcasp.c
> index aa14fc1c8011..4f8a2ce6ce78 100644
> --- a/sound/soc/ti/davinci-mcasp.c
> +++ b/sound/soc/ti/davinci-mcasp.c
> @@ -235,8 +235,8 @@ static void mcasp_start_rx(struct davinci_mcasp *mcasp)
>  	if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp)) {
>  		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST);
>  		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST);
> -		mcasp_set_clk_pdir(mcasp, true);
>  	}
> +	mcasp_set_clk_pdir(mcasp, true);
>  
>  	/* Activate serializer(s) */
>  	mcasp_set_reg(mcasp, DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF);
> @@ -311,10 +311,10 @@ static void mcasp_stop_rx(struct davinci_mcasp *mcasp)
>  	 * In synchronous mode stop the TX clocks if no other stream is
>  	 * running
>  	 */
> -	if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp) && !mcasp->streams) {
> -		mcasp_set_clk_pdir(mcasp, false);
> +	if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp) && !mcasp->streams)
>  		mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, 0);
> -	}
> +	if (!mcasp->streams)
> +		mcasp_set_clk_pdir(mcasp, false);

I'm not sure about this, but the sequence should be preserved, PDIR
change first.

>  
>  	mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, 0);
>  	mcasp_set_reg(mcasp, DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF);
> @@ -340,7 +340,7 @@ static void mcasp_stop_tx(struct davinci_mcasp *mcasp)
>  	 */
>  	if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp) && mcasp->streams)
>  		val =  TXHCLKRST | TXCLKRST | TXFSRST;
> -	else
> +	if (!mcasp->streams)
>  		mcasp_set_clk_pdir(mcasp, false);
>  
>  

-- 
Péter