Re: [PATCH 2/2] ASoC: rockchip: i2s-tdm: add the reset value of XFER to the regmap defaults

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] ASoC: rockchip: i2s-tdm: missing Fixes trailer for I2S_XFER
  reg_default
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commit fcc3b955539c797b954dd2c22348b8e552e615ec
Author: Arun Iyengar <aiyengar1990@gmail.com>

> ASoC: rockchip: i2s-tdm: add the reset value of XFER to the regmap defaults
>
> I2S_XFER (0x1c) is writeable and not volatile, so it is cached, but it
> has no entry in rockchip_i2s_tdm_reg_defaults[]. The flat cache then
> treats it as uninitialised, and the first cached access of it -- the
> regmap_update_bits() in the trigger and stop paths, or regcache_sync()
> after a runtime suspend -- warns
>
>   rockchip-i2s-tdm fddf0000.i2s: using zero-initialized flat cache, this may cause unexpected behavior
>
> It is the only cached register without a default: TXFIFOLR, INTSR, CLR,
> TXDR, RXDR and RXFIFOLR are volatile and all other registers have one.
>
> Add XFER with its reset value of 0 (TX and RX stopped), which is also
> what the zero-initialised cache assumed so far, so no register value
> written to the hardware changes.
>
> Signed-off-by: Arun Iyengar <aiyengar1990@gmail.com>

[Severity: Low]
Since I2S_XFER (0x1c) was omitted from rockchip_i2s_tdm_reg_defaults[]
when the driver was added, should this include a Fixes: tag so stable
trees can pick it up?

  Fixes: 081068fd6414 ("ASoC: rockchip: add support for i2s-tdm controller")

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Sashiko AI review · https://sashiko.dev/#/patchset/20261110-asoc-rockchip-i2s-tdm-v1-0-f32951b3c527@gmail.com?part=2