From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jonathan =?utf-8?Q?Neusch=C3=A4fer?= Subject: Re: [PATCH 1/2] sparse, llvm: group PHI nodes at the top of each BB Date: Wed, 17 Oct 2012 19:44:20 +0200 Message-ID: <20121017174420.GA2922@debian.debian> References: <5074BD6B.2090501@pobox.com> <20121010163306.GA2846@debian.debian> <20121016201426.GD2932@debian.debian> <507DC95C.7010106@gmail.com> <507E55FC.5010202@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from mailout-de.gmx.net ([213.165.64.22]:43371 "HELO mailout-de.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1755984Ab2JQRpZ (ORCPT ); Wed, 17 Oct 2012 13:45:25 -0400 Content-Disposition: inline In-Reply-To: Sender: linux-sparse-owner@vger.kernel.org List-Id: linux-sparse@vger.kernel.org To: Pekka Enberg Cc: Xi Wang , Jonathan =?utf-8?Q?Neusch=C3=A4fer?= , Jeff Garzik , linux-sparse@vger.kernel.org, Christopher Li , Jeff Garzik , Linus Torvalds On Wed, Oct 17, 2012 at 07:41:52PM +0300, Pekka Enberg wrote: > On 10/17/12 2:48 AM, Pekka Enberg wrote: > >> Is LLVM able to optimize away the allocas and use registers instead in > >> the emitted code? > > On Wed, Oct 17, 2012 at 9:53 AM, Xi Wang wrote: > > Yes. See the last part of my previous email, no load/store/alloca after > > LLVM's -mem2reg pass. > > Right. Jonathan, does Xi's suggestion sound reasonable to you? I'd > certainly prefer that over instruction reordering. It certainly does. Thanks, Xi! Jonathan