[PATCH 16/73] memops, ssa: Walk parent insns in reverse and skip mixed-size SSA

[Bart Van Assche <bvanassche@acm.org>]

Fix dominated-store elimination and SSA promotion in memops.c and ssa.c:
- Walk parent basic block instructions in reverse order in
  kill_dominated_stores() so intervening loads or calls after a
  dominating store are visited before the store itself.
- Skip SSA promotion in ssa_convert_one_var() when loads or stores
  access the same variable with mixed sizes or non-zero offsets.
- Add regression test validation/optim/volatile-dse-and-cfg.c.

Signed-off-by: Bart Van Assche <bvanassche@acm.org>
---
 memops.c                                |  4 +-
 ssa.c                                   |  6 +++
 validation/optim/volatile-dse-and-cfg.c | 53 +++++++++++++++++++++++++
 3 files changed, 61 insertions(+), 2 deletions(-)
 create mode 100644 validation/optim/volatile-dse-and-cfg.c

diff --git a/memops.c b/memops.c
index bfcdc1987a9d..4d2eac266b12 100644
--- a/memops.c
+++ b/memops.c
@@ -252,14 +252,14 @@ static void kill_dominated_stores(struct basic_block *bb)
 
 				if (bb_list_size(par->children) != 1)
 					goto next_parent;
-				FOR_EACH_PTR(par->insns, dom) {
+				FOR_EACH_PTR_REVERSE(par->insns, dom) {
 					if (!dom->bb)
 						continue;
 					if (dom == insn)
 						goto next_parent;
 					if (!try_to_kill_store(insn, dom, local))
 						goto next_parent;
-				} END_FOR_EACH_PTR(dom);
+				} END_FOR_EACH_PTR_REVERSE(dom);
 next_parent:
 				;
 			} END_FOR_EACH_PTR(par);
diff --git a/ssa.c b/ssa.c
index 4d3ead0c4ea2..0c9352c4958b 100644
--- a/ssa.c
+++ b/ssa.c
@@ -139,6 +139,7 @@ static void ssa_convert_one_var(struct entrypoint *ep, struct symbol *var)
 	bool local = true;
 	int nbr_stores = 0;
 	int nbr_uses   = 0;
+	bool same_size = true;
 	pseudo_t addr;
 
 	/* Never used as a symbol? */
@@ -172,6 +173,8 @@ static void ssa_convert_one_var(struct entrypoint *ep, struct symbol *var)
 			}
 			/* fall through */
 		case OP_LOAD:
+			if (insn->size != var->bit_size || insn->offset != 0)
+				same_size = false;
 			if (local) {
 				if (!samebb)
 					samebb = bb;
@@ -197,6 +200,9 @@ static void ssa_convert_one_var(struct entrypoint *ep, struct symbol *var)
 		return;
 	}
 
+	if (!same_size)
+		goto external_visibility;
+
 	idf_compute(ep, &idf, alpha);
 	FOR_EACH_PTR(idf, bb) {
 		struct instruction *node = insert_phi_node(bb, var);
diff --git a/validation/optim/volatile-dse-and-cfg.c b/validation/optim/volatile-dse-and-cfg.c
new file mode 100644
index 000000000000..8b0c2d21d539
--- /dev/null
+++ b/validation/optim/volatile-dse-and-cfg.c
@@ -0,0 +1,53 @@
+static void test_volatile_stores(volatile int *p)
+{
+	*p = 1;
+	*p = 2;
+}
+
+static void test_asm_mem(int *p)
+{
+	int x = 42;
+	asm volatile("" : : "m"(x));
+}
+
+struct mixed_bf {
+	int a:20;
+	int b:20;
+};
+
+static struct mixed_bf ssa_mixed_load(int c, struct mixed_bf x, struct mixed_bf y, int *out)
+{
+	struct mixed_bf s;
+	if (c)
+		s = x;
+	else
+		s = y;
+	struct mixed_bf copy = s;
+	*out = s.a;
+	return copy;
+}
+
+extern int glob;
+extern void ext_call(void);
+
+static void dom_store_order(int c)
+{
+	glob = 1;
+	if (c)
+		ext_call();
+	else
+		glob = 3;
+	glob = 2;
+}
+
+/*
+ * check-name: volatile-dse-and-cfg
+ * check-command: test-linearize -Wno-decl $file
+ *
+ * check-output-ignore
+ * check-output-excludes: VOID
+ * check-output-contains: store\\.32.*\\$1 -> 0\\[%arg1\\]
+ * check-output-contains: store\\.32.*\\$2 -> 0\\[%arg1\\]
+ * check-output-contains: store\\.32.*\\$42 -> 0\\[x\\]
+ * check-output-contains: store\\.32.*\\$1 -> 0\\[glob\\]
+ */