[PATCH v5 0/7] Add RZ/G3E xSPI support

[PATCH v5 0/7] Add RZ/G3E xSPI support

[Biju Das]

The xSPI IP found on RZ/G3E SoC similar to RPC-IF interface, but it
can support writes on memory-mapped area. Even though the registers are
different, the rpcif driver code can be reused for xSPI by adding wrapper
functions.

Merge strategy:
 Patch#7 in this series is spi related patch and has build dependency on
 patch#6. Maybe an Ack from SPI maintainer is required so that it can go
 through memory subsystem.

This patch series tested on RZ/G2L and RZ/G3E by overwriting boot
partitions.

v4->v5:
 * Added merge strategy in covering letter.
 * Dropped patch#2 and #5 as it is accepted
 * Removed CPG bindings header file changes from this series and posted
   with [1].
 * Updated example replacing R9A09G047_SPI_CLK_SPI->9 in bindings, so
   that there is no dependency with clk.
 * Replaced EXPORT_SYMBOL->EXPORT_SYMBOL_GPL and added kerneldoc for
   newly added export function xspi_dirmap_write().
 * Moved *_write() after *_read().

[1]https://lore.kernel.org/all/20250424081400.135028-2-biju.das.jz@bp.renesas.com/
v3->v4:
 * Added a definition for the spi core clock in the R9A09G047 CPG bindings
   header file.
 * Updated the example with spi core clock
 * Retained Rb tag from Rob as these changes are trivial.
 * Fixed the duplicate most outer set of parentheses in patch#2.
 * Updated commit description for patch{#4,#7,#8}.
 * Renamed the functions *_helper()->*_impl().
 * Replaced ssize_t->size_t as the return data type for
   rpcif_dirmap_read_impl().
 * Renamed the local variable length->read and it's data type
   ssize_t->size_t.
 * Added comment for addr_nbytes in struct rpcif_priv.
 * Added struct rpcif_impl for holding the function pointers and data to
   handle the differences between xspi and rpc-if interface and added
   suffix _impl() for functions.
 * The enabling/disabling of spi/spix2 clocks at runtime leading to
   flash write failure. So, enable these clocks during probe() and
   disable it in remove().
 * Collected tags.
v2->v3:
 * Fixed RPCIF_DRENR_CDB macro error.
v1->v2:
 * As rz-xspi is too generic, replaced file name rz-xspi->rzg3e-xspi
   and dropped generic compatible rz-xspi.
 * Dropped prefix spi from interrupt names.
 * Updated the example with above changes.
 * Retained Rb tag from Rob as these changes are trivial.
 * Fixed the build error reported by bot by dropping 
   EXPORT_SYMBOL(xspi_dirmap_read) and restoring
   EXPORT_SYMBOL(rpcif_dirmap_read).
 * Replaced enum XSPI_RZ->XSPI_RZ_G3E.
 * Replaced compatible rz-xspi->r9a09g047-xspi and device data
   xspi_info_rz->xspi_info_r9a09g047.

Biju Das (7):
  dt-bindings: memory: Document RZ/G3E support
  memory: renesas-rpc-if: Move rpc-if reg definitions
  memory: renesas-rpc-if: Use devm_reset_control_array_get_exclusive()
  memory: renesas-rpc-if: Add regmap to struct rpcif_info
  memory: renesas-rpc-if: Add wrapper functions
  memory: renesas-rpc-if: Add RZ/G3E xSPI support
  spi: rpc-if: Add write support for memory-mapped area

 .../renesas,rzg3e-xspi.yaml                   | 135 ++++
 drivers/memory/renesas-rpc-if-regs.h          | 147 ++++
 drivers/memory/renesas-rpc-if.c               | 674 +++++++++++++-----
 drivers/memory/renesas-xspi-if-regs.h         | 105 +++
 drivers/spi/spi-rpc-if.c                      |  16 +-
 include/memory/renesas-rpc-if.h               |   4 +
 6 files changed, 909 insertions(+), 172 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml
 create mode 100644 drivers/memory/renesas-rpc-if-regs.h
 create mode 100644 drivers/memory/renesas-xspi-if-regs.h

-- 
2.43.0

[PATCH v5 7/7] spi: rpc-if: Add write support for memory-mapped area

[Biju Das]

Add write support for memory-mapped area as xSPI interface require
it.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v4->v5:
 * No change.
 * This patch has build dependency with patch#6.
v3->v4:
 * No change.
v2->v3:
 * No change.
v1->v2:
 * No change.
---
 drivers/spi/spi-rpc-if.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-rpc-if.c b/drivers/spi/spi-rpc-if.c
index e0c66a24a3cb..627cffea5d5c 100644
--- a/drivers/spi/spi-rpc-if.c
+++ b/drivers/spi/spi-rpc-if.c
@@ -75,6 +75,19 @@ static bool rpcif_spi_mem_supports_op(struct spi_mem *mem,
 	return true;
 }
 
+static ssize_t xspi_spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc,
+					 u64 offs, size_t len, const void *buf)
+{
+	struct rpcif *rpc = spi_controller_get_devdata(desc->mem->spi->controller);
+
+	if (offs + desc->info.offset + len > U32_MAX)
+		return -EINVAL;
+
+	rpcif_spi_mem_prepare(desc->mem->spi, &desc->info.op_tmpl, &offs, &len);
+
+	return xspi_dirmap_write(rpc->dev, offs, len, buf);
+}
+
 static ssize_t rpcif_spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc,
 					 u64 offs, size_t len, void *buf)
 {
@@ -103,7 +116,7 @@ static int rpcif_spi_mem_dirmap_create(struct spi_mem_dirmap_desc *desc)
 	if (!rpc->dirmap)
 		return -EOPNOTSUPP;
 
-	if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_IN)
+	if (!rpc->xspi && desc->info.op_tmpl.data.dir != SPI_MEM_DATA_IN)
 		return -EOPNOTSUPP;
 
 	return 0;
@@ -125,6 +138,7 @@ static const struct spi_controller_mem_ops rpcif_spi_mem_ops = {
 	.exec_op	= rpcif_spi_mem_exec_op,
 	.dirmap_create	= rpcif_spi_mem_dirmap_create,
 	.dirmap_read	= rpcif_spi_mem_dirmap_read,
+	.dirmap_write	= xspi_spi_mem_dirmap_write,
 };
 
 static int rpcif_spi_probe(struct platform_device *pdev)
-- 
2.43.0

Re: [PATCH v5 0/7] Add RZ/G3E xSPI support

[Krzysztof Kozlowski]

On 24/04/2025 10:59, Biju Das wrote:
> Biju Das (7):
>   dt-bindings: memory: Document RZ/G3E support
>   memory: renesas-rpc-if: Move rpc-if reg definitions
>   memory: renesas-rpc-if: Use devm_reset_control_array_get_exclusive()
>   memory: renesas-rpc-if: Add regmap to struct rpcif_info
>   memory: renesas-rpc-if: Add wrapper functions
>   memory: renesas-rpc-if: Add RZ/G3E xSPI support
>   spi: rpc-if: Add write support for memory-mapped area

Mark,

I will prepare you a stable tag for spi once everything gets processed
by linux-next.

Best regards,
Krzysztof

Re: [PATCH v5 7/7] spi: rpc-if: Add write support for memory-mapped area

[Krzysztof Kozlowski]

On 24/04/2025 10:59, Biju Das wrote:
> Add write support for memory-mapped area as xSPI interface require
> it.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---

Mark,

For you:
https://lore.kernel.org/r/20250508090749.51379-2-krzysztof.kozlowski@linaro.org

Best regards,
Krzysztof

Re: (subset) [PATCH v5 0/7] Add RZ/G3E xSPI support

[Mark Brown]

On Thu, 24 Apr 2025 09:59:48 +0100, Biju Das wrote:
> The xSPI IP found on RZ/G3E SoC similar to RPC-IF interface, but it
> can support writes on memory-mapped area. Even though the registers are
> different, the rpcif driver code can be reused for xSPI by adding wrapper
> functions.
> 
> Merge strategy:
>  Patch#7 in this series is spi related patch and has build dependency on
>  patch#6. Maybe an Ack from SPI maintainer is required so that it can go
>  through memory subsystem.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[7/7] spi: rpc-if: Add write support for memory-mapped area
      commit: b0b8d3aeadb5c49bf78305a1bc844e5a9378257c

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark