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From: Dhruva Gole <d-gole@ti.com>
To: Yoshitaka Ikeda <ikeda@nskint.co.jp>
Cc: "linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Vaishnav Achath <vaishnav.a@ti.com>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"Takahiro.Kuwano@infineon.com" <Takahiro.Kuwano@infineon.com>,
	Pratyush Yadav <ptyadav@amazon.de>,
	Mark Brown <broonie@kernel.org>
Subject: RE: [PATCH v2 4/4] spi: cadence-quadspi: use STIG mode for small reads
Date: Wed, 26 Apr 2023 13:09:32 +0530	[thread overview]
Message-ID: <044a723e-b81e-f6f2-8bf7-3680a10abc86@ti.com> (raw)
In-Reply-To: <OSZPR01MB70048CE259A3D63C4179199A8B659@OSZPR01MB7004.jpnprd01.prod.outlook.com>

Hi Yoshitaka,

On 26/04/23 08:04, Yoshitaka Ikeda wrote:
> Hi Dhruva,
> 
> An error occurred in the following environments where this patch was applied, and the flash could not be accessed.
> However, after reverting to this patch, it is possible to access it.
> 
> - Environment
>    - OS : Linux 6.3
>    - SoC : Cyclone V

Please can you send me the register fields information for the
CQSPI controller used in this device?
I wanted to verify if atall there were any mismatch between the
controller I have tested with vs your SOC's controller.

>    - Flash : MT25QL512A
> 
> - Error at startup
>    - Kernel log
> [ 0.980290] spi-nor spi0.0: found mt25ql512a, expected n25q512a
> [ 1.485140] cadence-qspi ff705000.flash: Flash command execution timed out.
> [ 1.490792] spi-nor spi0.0: operation failed with -110
> [ 1.494654] spi-nor spi0.0: mt25ql512a (65536 Kbytes)
> 
> - Error at access
>    - Access command and log
> # hexdump -Cv /dev/mtdblock0
> hexdump: /dev/mtdblock0: Input/output error
> 
>    - Kernel log
> [ 2124.201193] cadence-qspi ff705000.flash: QSPI is still busy after 500ms timeout.
> [ 2124.201229] spi-nor spi0.0: operation failed with -110
> [ 2124.201256] I/O error, dev mtdblock0, sector 0 op 0x0:(READ) flags 0x80700 phys_seg 4 prio class 2
> [ 2124.711241] cadence-qspi ff705000.flash: QSPI is still busy after 500ms timeout.
> [ 2124.711276] spi-nor spi0.0: operation failed with -110
> [ 2124.711302] I/O error, dev mtdblock0, sector 8 op 0x0:(READ) flags 0x80700 phys_seg 3 prio class 2
> [ 2125.221193] cadence-qspi ff705000.flash: QSPI is still busy after 500ms timeout.
> [ 2125.221230] spi-nor spi0.0: operation failed with -110
> [ 2125.221256] I/O error, dev mtdblock0, sector 16 op 0x0:(READ) flags 0x80700 phys_seg 2 prio class 2
> [ 2125.731237] cadence-qspi ff705000.flash:. QSPI is still busy after 500ms timeout.
> [ 2125.731270] spi-nor spi0.0: operation failed with -110
> [ 2125.731296] I/O error, dev mtdblock0, sector 24 op 0x0:(READ) flags 0x80700 phys_seg 1 prio class 2
> [ 2126.241190] cadence-qspi ff705000.flash:. QSPI is still busy after 500ms timeout.
> [ 2126.241224] spi-nor spi0.0: operation failed with -110
> [ 2126.241251] I/O error, dev mtdblock0, sector 0 op 0x0:(READ) flags 0x0 phys_seg 1 prio class 2
> [ 2126.241274] Buffer I/O error on dev mtdblock0, logical block 0, async page read
> 
> 
> regards,
> Yoshitaka Ikeda
> 
> 
> [..snip..]

It maybe that STIG mode may have some different way of configuring/using
on your SoC.

However at this point it's only a guess and I will wait till I have the
exact information on the controller specs being used in this device
along with the register descriptions.

-- 
Thanks and Regards,
Dhruva Gole

  reply	other threads:[~2023-04-26  7:40 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-25  8:10 [PATCH v2 0/4] STIG Mode Fixes for spi-cadence-qspi driver Dhruva Gole
2023-01-25  8:10 ` [PATCH v2 1/4] spi: cadence-quadspi: Reset CMD_CTRL Reg on cmd r/w completion Dhruva Gole
2023-01-27 15:16   ` Pratyush Yadav
2023-02-07 13:06     ` Gole, Dhruva
2023-01-25  8:10 ` [PATCH v2 2/4] spi: cadence-quadspi: Add flag for direct mode writes Dhruva Gole
2023-01-25  8:10 ` [PATCH v2 3/4] spi: cadence-quadspi: setup ADDR Bits in cmd reads Dhruva Gole
2023-01-25  8:10 ` [PATCH v2 4/4] spi: cadence-quadspi: use STIG mode for small reads Dhruva Gole
2023-04-26  2:34   ` Yoshitaka Ikeda
2023-04-26  7:39     ` Dhruva Gole [this message]
2023-04-27  0:41       ` Yoshitaka Ikeda
2023-04-27 13:25         ` Dhruva Gole
2023-05-08  0:36           ` Yoshitaka Ikeda
2023-05-08  5:29             ` Dhruva Gole
2023-05-08  7:44               ` Yoshitaka Ikeda
2023-05-30  2:56                 ` Yoshitaka Ikeda
2023-02-14 21:10 ` [PATCH v2 0/4] STIG Mode Fixes for spi-cadence-qspi driver Mark Brown

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