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From: Heiner Kallweit <hkallweit1-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: "linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: [PATCH v2 06/09] spi: fsl-espi: make better use of the RX FIFO
Date: Thu, 27 Oct 2016 21:27:56 +0200	[thread overview]
Message-ID: <082fee3f-4623-2cca-803b-b0fdf7cc8ab1@gmail.com> (raw)
In-Reply-To: <5b98be38-17a2-79a2-14da-fb2bb6f8820f-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

So far an interrupt is triggered whenever there's at least one byte
in the RX FIFO. This results in a unnecessarily high number of
interrupts.
Change this to generate an interrupt if
- RX FIFO is half full (except if all bytes to read fit into the
  RX FIFO anyway)
- end of transfer has been reached

This way the number of interrupts can be significantly reduced.

Signed-off-by: Heiner Kallweit <hkallweit1-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
v2:
- rebased
---
 drivers/spi/spi-fsl-espi.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-fsl-espi.c b/drivers/spi/spi-fsl-espi.c
index ca14575..06fb185 100644
--- a/drivers/spi/spi-fsl-espi.c
+++ b/drivers/spi/spi-fsl-espi.c
@@ -55,9 +55,10 @@
 #define CSMODE_CG(x)		((x) << 3)
 
 #define FSL_ESPI_FIFO_SIZE	32
+#define FSL_ESPI_RXTHR		15
 
 /* Default mode/csmode for eSPI controller */
-#define SPMODE_INIT_VAL (SPMODE_TXTHR(4) | SPMODE_RXTHR(3))
+#define SPMODE_INIT_VAL (SPMODE_TXTHR(4) | SPMODE_RXTHR(FSL_ESPI_RXTHR))
 #define CSMODE_INIT_VAL (CSMODE_POL_1 | CSMODE_BEF(0) \
 		| CSMODE_AFT(0) | CSMODE_CG(1))
 
@@ -281,6 +282,7 @@ static void fsl_espi_setup_transfer(struct spi_device *spi,
 static int fsl_espi_bufs(struct spi_device *spi, struct spi_transfer *t)
 {
 	struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
+	u32 mask;
 	int ret;
 
 	mpc8xxx_spi->rx_len = t->len;
@@ -295,8 +297,11 @@ static int fsl_espi_bufs(struct spi_device *spi, struct spi_transfer *t)
 	fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPCOM,
 		(SPCOM_CS(spi->chip_select) | SPCOM_TRANLEN(t->len - 1)));
 
-	/* enable rx ints */
-	fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIM, SPIM_RNE);
+	/* enable interrupts */
+	mask = SPIM_DON;
+	if (mpc8xxx_spi->rx_len > FSL_ESPI_FIFO_SIZE)
+		mask |= SPIM_RXT;
+	fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIM, mask);
 
 	/* Prevent filling the fifo from getting interrupted */
 	spin_lock_irq(&mpc8xxx_spi->lock);
-- 
2.10.1


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  parent reply	other threads:[~2016-10-27 19:27 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <5b98be38-17a2-79a2-14da-fb2bb6f8820f@gmail.com>
     [not found] ` <5b98be38-17a2-79a2-14da-fb2bb6f8820f-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-10-02 12:22   ` [PATCH 02/11] spi: fsl-espi: remove unneeded check for SPI_QE_CPU_MODE Heiner Kallweit
     [not found]     ` <20608368-44e6-21f8-d970-5ade9990ce59-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-10-06 15:45       ` Mark Brown
     [not found]         ` <20161006154543.rxlrc3sumejozpcg-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2016-10-06 18:36           ` Heiner Kallweit
     [not found]             ` <bbe77580-1ac2-4071-5d7d-f786c54ad177-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-10-26 17:07               ` Mark Brown
2016-10-02 12:22   ` [PATCH 03/11] spi: fsl-espi: fix handling of word sizes other than 8 bit Heiner Kallweit
2016-10-02 12:23   ` [PATCH 04/11] spi: fsl-espi: fix and improve writing to TX FIFO Heiner Kallweit
     [not found]     ` <c246dbf2-c59e-f029-afa1-8a5c6f6dd24b-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-10-28 18:53       ` Applied "spi: fsl-espi: fix and improve writing to TX FIFO" to the spi tree Mark Brown
2016-10-02 12:23   ` [PATCH 05/11] spi: fsl-espi: Rename len in struct mpc8xxx_spi to rx_len and make it unsigned Heiner Kallweit
2016-10-02 12:23   ` [PATCH 06/11] spi: fsl-espi: simplify and inline function fsl_espi_change_mode Heiner Kallweit
     [not found]     ` <0aeb49f0-dbfb-7acb-3829-cabafe4e7291-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-10-28 18:52       ` Applied "spi: fsl-espi: simplify and inline function fsl_espi_change_mode" to the spi tree Mark Brown
2016-10-02 12:23   ` [PATCH 07/11] spi: fsl-espi: fix and improve reading from RX FIFO Heiner Kallweit
2016-10-02 12:23   ` [PATCH 08/11] spi: fsl-espi: make better use of the " Heiner Kallweit
     [not found]     ` <144b73b1-dff2-a5b6-9df1-837238f20008-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-10-28 18:51       ` Applied "spi: fsl-espi: make better use of the RX FIFO" to the spi tree Mark Brown
2016-10-02 12:23   ` [PATCH 09/11] spi: fsl-espi: extend and improve transfer error handling Heiner Kallweit
     [not found]     ` <4ba19a7f-9f66-54c4-9119-e85671d608fb-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-10-28 18:52       ` Applied "spi: fsl-espi: extend and improve transfer error handling" to the spi tree Mark Brown
2016-10-02 12:23   ` [PATCH 10/11] spi: fsl-espi: add support for RXSKIP mode Heiner Kallweit
2016-10-02 12:23   ` [PATCH 11/11] spi: fsl-espi: add support for dual read mode Heiner Kallweit
2016-10-27 19:24   ` [PATCH v2 01/09] spi: fsl-espi: improve check for SPI_QE_CPU_MODE Heiner Kallweit
     [not found]     ` <0b5e7849-88d6-2af5-a428-eeb0de0f2af2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-10-28 18:34       ` Mark Brown
2016-10-28 18:53       ` Applied "spi: fsl-espi: improve check for SPI_QE_CPU_MODE" to the spi tree Mark Brown
2016-10-27 19:25   ` [PATCH v2 02/09] spi: fsl-espi: fix and improve writing to TX FIFO Heiner Kallweit
2016-10-27 19:26   ` [PATCH v2 03/09] spi: fsl-espi: Rename len in struct mpc8xxx_spi to rx_len and make it unsigned Heiner Kallweit
     [not found]     ` <611500a3-d254-f04c-ce20-6905a649bcda-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-10-28 18:53       ` Applied "spi: fsl-espi: Rename len in struct mpc8xxx_spi to rx_len and make it unsigned" to the spi tree Mark Brown
2016-10-27 19:26   ` [PATCH v2 04/09] spi: fsl-espi: simplify and inline function fsl_espi_change_mode Heiner Kallweit
2016-10-27 19:27   ` [PATCH v2 05/09] spi: fsl-espi: fix and improve reading from RX FIFO Heiner Kallweit
     [not found]     ` <6ae20ab9-4068-9be7-654d-12424de35716-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-10-28 18:51       ` Applied "spi: fsl-espi: fix and improve reading from RX FIFO" to the spi tree Mark Brown
2016-10-27 19:27   ` Heiner Kallweit [this message]
2016-10-27 19:28   ` [PATCH v2 07/09] spi: fsl-espi: extend and improve transfer error handling Heiner Kallweit
2016-10-27 19:28   ` [PATCH v2 08/09] spi: fsl-espi: add support for RXSKIP mode Heiner Kallweit
2016-10-27 19:29   ` [PATCH v2 09/09] spi: fsl-espi: add support for dual read mode Heiner Kallweit

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