From: "Ramuthevar, Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>
To: Rob Herring <robh@kernel.org>
Cc: broonie@kernel.org, vigneshr@ti.com, tudor.ambarus@microchip.com,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, miquel.raynal@bootlin.com,
simon.k.r.goldschmidt@gmail.com, dinguyen@kernel.org,
richard@nod.at, cheol.yong.kim@intel.com, qi-ming.wu@intel.com
Subject: Re: [PATCH v6 6/6] dt-bindings: spi: Add compatible for Intel LGM SoC
Date: Mon, 9 Nov 2020 09:49:41 +0800 [thread overview]
Message-ID: <12deb9bb-6b3b-d71b-0a6e-5b58da23e09d@linux.intel.com> (raw)
In-Reply-To: <20201104220321.GB4192737@bogus>
Hi Rob,
On 5/11/2020 6:03 am, Rob Herring wrote:
> On Fri, Oct 30, 2020 at 01:31:53PM +0800, Ramuthevar,Vadivel MuruganX wrote:
>> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>>
>> Add compatible for Intel LGM SoC.
>>
>> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>> ---
>> Documentation/devicetree/bindings/spi/cadence-quadspi.yaml | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
>> index ec22b040d804..58ecdab939df 100644
>> --- a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
>> +++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
>> @@ -19,6 +19,7 @@ properties:
>> - enum:
>> - ti,k2g-qspi
>> - ti,am654-ospi
>> + - intel,lgm-qspi
>
> As this change shows, you don't need 'oneOf' for Intel...
As we you have suggested in the previous mail, I framed like below with
'oneOf'
properties:
compatible:
oneOf:
- items:
- enum:
- ti,k2g-qspi
- ti,am654-ospi
- const: cdns,qspi-nor
- items:
- enum:
- intel,lgm-qspi
- cadence,qspi #compatible for generic in future use
- const: cdns,qspi-nor
so that ignoring error message warning can be avoided as well, Thanks!
Regards
Vadivel
>
>> - const: cdns,qspi-nor
>>
>> reg:
>> --
>> 2.11.0
>>
next prev parent reply other threads:[~2020-11-09 1:49 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-30 5:31 [PATCH v6 0/6] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-10-30 5:31 ` [PATCH v6 1/6] spi: cadence-quadspi: Add QSPI " Ramuthevar,Vadivel MuruganX
2020-10-30 5:31 ` [PATCH v6 2/6] spi: cadence-quadspi: Disable the DAC " Ramuthevar,Vadivel MuruganX
2020-11-03 16:09 ` Pratyush Yadav
2020-11-04 9:18 ` Ramuthevar, Vadivel MuruganX
2020-10-30 5:31 ` [PATCH v6 3/6] spi: cadence-quadspi: Add multi-chipselect support " Ramuthevar,Vadivel MuruganX
2020-11-05 7:11 ` Linus Walleij
2020-11-06 4:33 ` Ramuthevar, Vadivel MuruganX
2020-10-30 5:31 ` [PATCH v6 4/6] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi Ramuthevar,Vadivel MuruganX
2020-10-30 5:31 ` [PATCH v6 5/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml Ramuthevar,Vadivel MuruganX
2020-10-30 15:18 ` Rob Herring
2020-11-02 5:59 ` Ramuthevar, Vadivel MuruganX
2020-11-04 22:02 ` Rob Herring
2020-11-09 1:40 ` Ramuthevar, Vadivel MuruganX
2020-10-30 5:31 ` [PATCH v6 6/6] dt-bindings: spi: Add compatible for Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-11-04 22:03 ` Rob Herring
2020-11-09 1:49 ` Ramuthevar, Vadivel MuruganX [this message]
2020-11-09 15:15 ` Rob Herring
2020-11-10 5:21 ` Ramuthevar, Vadivel MuruganX
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