From mboxrd@z Thu Jan 1 00:00:00 1970 From: dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org Subject: [PATCH 07/11] spi-dw: Set number of available chip selects correctly Date: Wed, 22 Jun 2011 19:00:09 -0700 Message-ID: <1308794413-11069-8-git-send-email-dirk.brandewie@gmail.com> References: <1308794413-11069-1-git-send-email-dirk.brandewie@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: Dirk Brandewie To: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Return-path: In-Reply-To: <1308794413-11069-1-git-send-email-dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: spi-devel-general-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: linux-spi.vger.kernel.org From: Dirk Brandewie Only four chip selects are available directly off the pins of the master. Signed-off-by: Dirk Brandewie --- drivers/spi/spi-dw-mid.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c index 78e64d3..1d11268 100644 --- a/drivers/spi/spi-dw-mid.c +++ b/drivers/spi/spi-dw-mid.c @@ -211,7 +211,9 @@ int spi_dw_mid_init(struct spi_dw *dws) dws->max_freq = MRST_SPI_CLK_BASE / (clk_cdiv + 1); iounmap(clk_reg); - dws->num_cs = 16; + dws->num_cs = 4; /* spi_dw_chip_sel() bits 0-3 are + * valid in the slave enable register + */ dws->fifo_len = 40; /* FIFO has 40 words buffer */ #ifdef CONFIG_SPI_DW_MID_DMA -- 1.7.3.4 ------------------------------------------------------------------------------ Simplify data backup and recovery for your virtual environment with vRanger. Installation's a snap, and flexible recovery options mean your data is safe, secure and there when you need it. Data protection magic? Nope - It's vRanger. Get your free trial download today. http://p.sf.net/sfu/quest-sfdev2dev