From mboxrd@z Thu Jan 1 00:00:00 1970 From: Linus Walleij Subject: [PATCH v2] RFC: spi/sa1100: rewrite the SA1100 SPI driver Date: Wed, 13 Jun 2012 13:55:26 +0200 Message-ID: <1339588526-31275-1-git-send-email-linus.walleij@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: Nicolas Pitre , Russell King , Linus Walleij , Kristoffer Ericson To: Kristoffer Ericson , linux-arm-kernel@lists.infradead.org, spi-devel-general@lists.sourceforge.net Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org List-Id: linux-spi.vger.kernel.org This heavily rewrites the SA1100 SPI driver and moves it to the SPI subsystem. I seriously doubt it will work (though you're encouraged to give it a spin). It is meant as a starting point for others who are able to pick up on it. I discussed this with Kristoffer some time back. The Jornada 720 seems to be the only in-kernel user of the SSP, so the MCU driver (now called jornada720_ssp.c) is now an SPI device on the SPI bus, and the jornada720_ssp is just "some SPI device". Anything generic (like GPIO toggling to sync to the other side) is now in the SPI driver. The spinlock across transfers found in jornada720_ssp is probably not going to play well with the SPI subsystem so this has been replaced by a mutex. Cc: Kristoffer Ericson Cc: Nicolas Pitre Cc: Russell King Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Rebase to v3.5-rc1 - Move SA1100 SSP platform data to - Store bits per word (bpw) for the device in the state holder. - Rewrite to use the new transfer queue. - Delete reference to the FIFO data register from SA-1100.h since SA1100 now uses dmaengine and the device tells the engine what register to use. - Use devm_* family for iomap, irq request etc. Kristoffer, can you test this on the Jornada? I suspect you're the only one who can actually take the SSP driver for a ride on real hardware. --- arch/arm/include/asm/hardware/ssp.h | 28 -- arch/arm/mach-sa1100/Kconfig | 10 +- arch/arm/mach-sa1100/Makefile | 1 - arch/arm/mach-sa1100/include/mach/SA-1100.h | 83 +----- arch/arm/mach-sa1100/jornada720.c | 52 +++- arch/arm/mach-sa1100/jornada720_ssp.c | 79 ++--- arch/arm/mach-sa1100/ssp.c | 243 -------------- drivers/spi/Kconfig | 7 + drivers/spi/Makefile | 1 + drivers/spi/spi-sa1100.c | 470 +++++++++++++++++++++++++++ include/linux/platform_data/sa1100-ssp.h | 15 + 11 files changed, 574 insertions(+), 415 deletions(-) delete mode 100644 arch/arm/include/asm/hardware/ssp.h delete mode 100644 arch/arm/mach-sa1100/ssp.c create mode 100644 drivers/spi/spi-sa1100.c create mode 100644 include/linux/platform_data/sa1100-ssp.h diff --git a/arch/arm/include/asm/hardware/ssp.h b/arch/arm/include/asm/hardware/ssp.h deleted file mode 100644 index 3b42e18..0000000 --- a/arch/arm/include/asm/hardware/ssp.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * ssp.h - * - * Copyright (C) 2003 Russell King, All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef SSP_H -#define SSP_H - -struct ssp_state { - unsigned int cr0; - unsigned int cr1; -}; - -int ssp_write_word(u16 data); -int ssp_read_word(u16 *data); -int ssp_flush(void); -void ssp_enable(void); -void ssp_disable(void); -void ssp_save_state(struct ssp_state *ssp); -void ssp_restore_state(struct ssp_state *ssp); -int ssp_init(void); -void ssp_exit(void); - -#endif diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig index 42625e4..cb1c115 100644 --- a/arch/arm/mach-sa1100/Kconfig +++ b/arch/arm/mach-sa1100/Kconfig @@ -95,7 +95,8 @@ config SA1100_JORNADA720 config SA1100_JORNADA720_SSP bool "HP Jornada 720 Extended SSP driver" - select SA1100_SSP + select SPI + select SPI_SA1100 depends on SA1100_JORNADA720 help Say Y here if you have a HP Jornada 7xx handheld computer and you @@ -157,13 +158,6 @@ config SA1100_SIMPAD like CL4 in additional it has a PCMCIA-Slot. For more information visit or . -config SA1100_SSP - tristate "Generic PIO SSP" - help - Say Y here to enable support for the generic PIO SSP driver. - This isn't for audio support, but for attached sensors and - other devices, eg for BadgePAD 4 sensor support. - endmenu endif diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile index 60b97ec..b7f348e 100644 --- a/arch/arm/mach-sa1100/Makefile +++ b/arch/arm/mach-sa1100/Makefile @@ -51,5 +51,4 @@ obj-$(CONFIG_LEDS) += $(led-y) # Miscellaneous functions obj-$(CONFIG_PM) += pm.o sleep.o -obj-$(CONFIG_SA1100_SSP) += ssp.o diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h b/arch/arm/mach-sa1100/include/mach/SA-1100.h index 3f2d1b6..b6310b2 100644 --- a/arch/arm/mach-sa1100/include/mach/SA-1100.h +++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h @@ -727,86 +727,8 @@ #define MCCR1_F10MHz (MCCR1_CFS*1) /* Freq. (fmc) = ~ 10 MHz */ /* (9.585 MHz) */ - -/* - * Synchronous Serial Port (SSP) control registers - * - * Registers - * Ser4SSCR0 Serial port 4 Synchronous Serial Port (SSP) Control - * Register 0 (read/write). - * Ser4SSCR1 Serial port 4 Synchronous Serial Port (SSP) Control - * Register 1 (read/write). - * [Bits SPO and SP are only implemented in versions 2.0 - * (rev. = 8) and higher of the StrongARM SA-1100.] - * Ser4SSDR Serial port 4 Synchronous Serial Port (SSP) Data - * Register (read/write). - * Ser4SSSR Serial port 4 Synchronous Serial Port (SSP) Status - * Register (read/write). - * - * Clocks - * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz - * or 3.5795 MHz). - * fss, Tss Frequency, period of the SSP communication. - */ - -#define Ser4SSCR0 __REG(0x80070060) /* Ser. port 4 SSP Control Reg. 0 */ -#define Ser4SSCR1 __REG(0x80070064) /* Ser. port 4 SSP Control Reg. 1 */ -#define Ser4SSDR __REG(0x8007006C) /* Ser. port 4 SSP Data Reg. */ -#define Ser4SSSR __REG(0x80070074) /* Ser. port 4 SSP Status Reg. */ - -#define SSCR0_DSS Fld (4, 0) /* Data Size - 1 Select [3..15] */ -#define SSCR0_DataSize(Size) /* Data Size Select [4..16] */ \ - (((Size) - 1) << FShft (SSCR0_DSS)) -#define SSCR0_FRF Fld (2, 4) /* FRame Format */ -#define SSCR0_Motorola /* Motorola Serial Peripheral */ \ - /* Interface (SPI) format */ \ - (0 << FShft (SSCR0_FRF)) -#define SSCR0_TI /* Texas Instruments Synchronous */ \ - /* Serial format */ \ - (1 << FShft (SSCR0_FRF)) -#define SSCR0_National /* National Microwire format */ \ - (2 << FShft (SSCR0_FRF)) -#define SSCR0_SSE 0x00000080 /* SSP Enable */ -#define SSCR0_SCR Fld (8, 8) /* Serial Clock Rate divisor/2 - 1 */ - /* fss = fxtl/(2*(SCR + 1)) */ - /* Tss = 2*(SCR + 1)*Txtl */ -#define SSCR0_SerClkDiv(Div) /* Serial Clock Divisor [2..512] */ \ - (((Div) - 2)/2 << FShft (SSCR0_SCR)) - /* fss = fxtl/(2*Floor (Div/2)) */ - /* Tss = 2*Floor (Div/2)*Txtl */ -#define SSCR0_CeilSerClkDiv(Div) /* Ceil. of SerClkDiv [2..512] */ \ - (((Div) - 1)/2 << FShft (SSCR0_SCR)) - /* fss = fxtl/(2*Ceil (Div/2)) */ - /* Tss = 2*Ceil (Div/2)*Txtl */ - -#define SSCR1_RIE 0x00000001 /* Receive FIFO 1/2-full or more */ - /* Interrupt Enable */ -#define SSCR1_TIE 0x00000002 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ -#define SSCR1_LBM 0x00000004 /* Look-Back Mode */ -#define SSCR1_SPO 0x00000008 /* Sample clock (SCLK) POlarity */ -#define SSCR1_SClkIactL (SSCR1_SPO*0) /* Sample Clock Inactive Low */ -#define SSCR1_SClkIactH (SSCR1_SPO*1) /* Sample Clock Inactive High */ -#define SSCR1_SP 0x00000010 /* Sample clock (SCLK) Phase */ -#define SSCR1_SClk1P (SSCR1_SP*0) /* Sample Clock active 1 Period */ - /* after frame (SFRM, 1st edge) */ -#define SSCR1_SClk1_2P (SSCR1_SP*1) /* Sample Clock active 1/2 Period */ - /* after frame (SFRM, 1st edge) */ -#define SSCR1_ECS 0x00000020 /* External Clock Select */ -#define SSCR1_IntClk (SSCR1_ECS*0) /* Internal Clock */ -#define SSCR1_ExtClk (SSCR1_ECS*1) /* External Clock (GPIO [19]) */ - -#define SSDR_DATA Fld (16, 0) /* receive/transmit DATA FIFOs */ - -#define SSSR_TNF 0x00000002 /* Transmit FIFO Not Full (read) */ -#define SSSR_RNE 0x00000004 /* Receive FIFO Not Empty (read) */ -#define SSSR_BSY 0x00000008 /* SSP BuSY (read) */ -#define SSSR_TFS 0x00000010 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ -#define SSSR_RFS 0x00000020 /* Receive FIFO 1/2-full or more */ - /* Service request (read) */ -#define SSSR_ROR 0x00000040 /* Receive FIFO Over-Run */ - +/* The driver will contain the offsets for this peripheral */ +#define Ser4SSBase 0x80070000 /* * Operating System (OS) timer control registers @@ -1594,7 +1516,6 @@ #define DMA_SIZE (6 * 0x20) #define DMA_PHYS 0xb0000000 - /* * Liquid Crystal Display (LCD) control registers * diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c index e3084f4..8abd1b6 100644 --- a/arch/arm/mach-sa1100/jornada720.c +++ b/arch/arm/mach-sa1100/jornada720.c @@ -21,6 +21,8 @@ #include #include #include +#include +#include #include