[PATCH 1/7] ARM: mxs: Move SSP register definitions into separate file

[PATCH 1/7] ARM: mxs: Move SSP register definitions into separate file

[Marek Vasut]

Move the definitions into separate file so separate SPI driver can be
implemented. The SSP controller in MXS can act both as a MMC host and
as a SPI host.

Based on previous attempt by:
Fabio Estevam <fabio.estevam@freescale.com>

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <cjb@laptop.org>
Cc: Detlev Zundel <dzu@denx.de>
CC: Dong Aisheng <b29396@freescale.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linux ARM kernel <linux-arm-kernel@lists.infradead.org>
Cc: Rob Herring <rob.herring@calxeda.com>
CC: Shawn Guo <shawn.guo@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
---
 drivers/mmc/host/mxs-mmc.c  |   87 ++--------------------------------
 include/linux/spi/mxs-spi.h |  109 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 112 insertions(+), 84 deletions(-)
 create mode 100644 include/linux/spi/mxs-spi.h

diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index 9bfd08e..6a14e10 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -45,87 +45,10 @@
 #include <linux/pinctrl/consumer.h>
 #include <linux/stmp_device.h>
 #include <linux/mmc/mxs-mmc.h>
+#include <linux/spi/mxs-spi.h>
 
 #define DRIVER_NAME	"mxs-mmc"
 
-/* card detect polling timeout */
-#define MXS_MMC_DETECT_TIMEOUT			(HZ/2)
-
-#define ssp_is_old(host)	((host)->devid == IMX23_MMC)
-
-/* SSP registers */
-#define HW_SSP_CTRL0				0x000
-#define  BM_SSP_CTRL0_RUN			(1 << 29)
-#define  BM_SSP_CTRL0_SDIO_IRQ_CHECK		(1 << 28)
-#define  BM_SSP_CTRL0_IGNORE_CRC		(1 << 26)
-#define  BM_SSP_CTRL0_READ			(1 << 25)
-#define  BM_SSP_CTRL0_DATA_XFER			(1 << 24)
-#define  BP_SSP_CTRL0_BUS_WIDTH			(22)
-#define  BM_SSP_CTRL0_BUS_WIDTH			(0x3 << 22)
-#define  BM_SSP_CTRL0_WAIT_FOR_IRQ		(1 << 21)
-#define  BM_SSP_CTRL0_LONG_RESP			(1 << 19)
-#define  BM_SSP_CTRL0_GET_RESP			(1 << 17)
-#define  BM_SSP_CTRL0_ENABLE			(1 << 16)
-#define  BP_SSP_CTRL0_XFER_COUNT		(0)
-#define  BM_SSP_CTRL0_XFER_COUNT		(0xffff)
-#define HW_SSP_CMD0				0x010
-#define  BM_SSP_CMD0_DBL_DATA_RATE_EN		(1 << 25)
-#define  BM_SSP_CMD0_SLOW_CLKING_EN		(1 << 22)
-#define  BM_SSP_CMD0_CONT_CLKING_EN		(1 << 21)
-#define  BM_SSP_CMD0_APPEND_8CYC		(1 << 20)
-#define  BP_SSP_CMD0_BLOCK_SIZE			(16)
-#define  BM_SSP_CMD0_BLOCK_SIZE			(0xf << 16)
-#define  BP_SSP_CMD0_BLOCK_COUNT		(8)
-#define  BM_SSP_CMD0_BLOCK_COUNT		(0xff << 8)
-#define  BP_SSP_CMD0_CMD			(0)
-#define  BM_SSP_CMD0_CMD			(0xff)
-#define HW_SSP_CMD1				0x020
-#define HW_SSP_XFER_SIZE			0x030
-#define HW_SSP_BLOCK_SIZE			0x040
-#define  BP_SSP_BLOCK_SIZE_BLOCK_COUNT		(4)
-#define  BM_SSP_BLOCK_SIZE_BLOCK_COUNT		(0xffffff << 4)
-#define  BP_SSP_BLOCK_SIZE_BLOCK_SIZE		(0)
-#define  BM_SSP_BLOCK_SIZE_BLOCK_SIZE		(0xf)
-#define HW_SSP_TIMING(h)			(ssp_is_old(h) ? 0x050 : 0x070)
-#define  BP_SSP_TIMING_TIMEOUT			(16)
-#define  BM_SSP_TIMING_TIMEOUT			(0xffff << 16)
-#define  BP_SSP_TIMING_CLOCK_DIVIDE		(8)
-#define  BM_SSP_TIMING_CLOCK_DIVIDE		(0xff << 8)
-#define  BP_SSP_TIMING_CLOCK_RATE		(0)
-#define  BM_SSP_TIMING_CLOCK_RATE		(0xff)
-#define HW_SSP_CTRL1(h)				(ssp_is_old(h) ? 0x060 : 0x080)
-#define  BM_SSP_CTRL1_SDIO_IRQ			(1 << 31)
-#define  BM_SSP_CTRL1_SDIO_IRQ_EN		(1 << 30)
-#define  BM_SSP_CTRL1_RESP_ERR_IRQ		(1 << 29)
-#define  BM_SSP_CTRL1_RESP_ERR_IRQ_EN		(1 << 28)
-#define  BM_SSP_CTRL1_RESP_TIMEOUT_IRQ		(1 << 27)
-#define  BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN	(1 << 26)
-#define  BM_SSP_CTRL1_DATA_TIMEOUT_IRQ		(1 << 25)
-#define  BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN	(1 << 24)
-#define  BM_SSP_CTRL1_DATA_CRC_IRQ		(1 << 23)
-#define  BM_SSP_CTRL1_DATA_CRC_IRQ_EN		(1 << 22)
-#define  BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ		(1 << 21)
-#define  BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ_EN	(1 << 20)
-#define  BM_SSP_CTRL1_RECV_TIMEOUT_IRQ		(1 << 17)
-#define  BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN	(1 << 16)
-#define  BM_SSP_CTRL1_FIFO_OVERRUN_IRQ		(1 << 15)
-#define  BM_SSP_CTRL1_FIFO_OVERRUN_IRQ_EN	(1 << 14)
-#define  BM_SSP_CTRL1_DMA_ENABLE		(1 << 13)
-#define  BM_SSP_CTRL1_POLARITY			(1 << 9)
-#define  BP_SSP_CTRL1_WORD_LENGTH		(4)
-#define  BM_SSP_CTRL1_WORD_LENGTH		(0xf << 4)
-#define  BP_SSP_CTRL1_SSP_MODE			(0)
-#define  BM_SSP_CTRL1_SSP_MODE			(0xf)
-#define HW_SSP_SDRESP0(h)			(ssp_is_old(h) ? 0x080 : 0x0a0)
-#define HW_SSP_SDRESP1(h)			(ssp_is_old(h) ? 0x090 : 0x0b0)
-#define HW_SSP_SDRESP2(h)			(ssp_is_old(h) ? 0x0a0 : 0x0c0)
-#define HW_SSP_SDRESP3(h)			(ssp_is_old(h) ? 0x0b0 : 0x0d0)
-#define HW_SSP_STATUS(h)			(ssp_is_old(h) ? 0x0c0 : 0x100)
-#define  BM_SSP_STATUS_CARD_DETECT		(1 << 28)
-#define  BM_SSP_STATUS_SDIO_IRQ			(1 << 17)
-
-#define BF_SSP(value, field)	(((value) << BP_SSP_##field) & BM_SSP_##field)
-
 #define MXS_MMC_IRQ_BITS	(BM_SSP_CTRL1_SDIO_IRQ		| \
 				 BM_SSP_CTRL1_RESP_ERR_IRQ	| \
 				 BM_SSP_CTRL1_RESP_TIMEOUT_IRQ	| \
@@ -135,12 +58,8 @@
 				 BM_SSP_CTRL1_RECV_TIMEOUT_IRQ  | \
 				 BM_SSP_CTRL1_FIFO_OVERRUN_IRQ)
 
-#define SSP_PIO_NUM	3
-
-enum mxs_mmc_id {
-	IMX23_MMC,
-	IMX28_MMC,
-};
+/* card detect polling timeout */
+#define MXS_MMC_DETECT_TIMEOUT			(HZ/2)
 
 struct mxs_mmc_host {
 	struct mmc_host			*mmc;
diff --git a/include/linux/spi/mxs-spi.h b/include/linux/spi/mxs-spi.h
new file mode 100644
index 0000000..b7ccd57
--- /dev/null
+++ b/include/linux/spi/mxs-spi.h
@@ -0,0 +1,109 @@
+/*
+ * include/linux/spi/mxs-spi.h
+ *
+ * Freescale i.MX233/i.MX28 SPI controller register definition
+ *
+ * Copyright 2008 Embedded Alley Solutions, Inc.
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#ifndef __LINUX_SPI_MXS_SPI_H__
+#define __LINUX_SPI_MXS_SPI_H__
+
+#define ssp_is_old(host)	((host)->devid == IMX23_MMC)
+
+/* SSP registers */
+#define HW_SSP_CTRL0				0x000
+#define  BM_SSP_CTRL0_RUN			(1 << 29)
+#define  BM_SSP_CTRL0_SDIO_IRQ_CHECK		(1 << 28)
+#define  BM_SSP_CTRL0_IGNORE_CRC		(1 << 26)
+#define  BM_SSP_CTRL0_READ			(1 << 25)
+#define  BM_SSP_CTRL0_DATA_XFER			(1 << 24)
+#define  BP_SSP_CTRL0_BUS_WIDTH			22
+#define  BM_SSP_CTRL0_BUS_WIDTH			(0x3 << 22)
+#define  BM_SSP_CTRL0_WAIT_FOR_IRQ		(1 << 21)
+#define  BM_SSP_CTRL0_LONG_RESP			(1 << 19)
+#define  BM_SSP_CTRL0_GET_RESP			(1 << 17)
+#define  BM_SSP_CTRL0_ENABLE			(1 << 16)
+#define  BP_SSP_CTRL0_XFER_COUNT		0
+#define  BM_SSP_CTRL0_XFER_COUNT		0xffff
+#define HW_SSP_CMD0				0x010
+#define  BM_SSP_CMD0_DBL_DATA_RATE_EN		(1 << 25)
+#define  BM_SSP_CMD0_SLOW_CLKING_EN		(1 << 22)
+#define  BM_SSP_CMD0_CONT_CLKING_EN		(1 << 21)
+#define  BM_SSP_CMD0_APPEND_8CYC		(1 << 20)
+#define  BP_SSP_CMD0_BLOCK_SIZE			16
+#define  BM_SSP_CMD0_BLOCK_SIZE			(0xf << 16)
+#define  BP_SSP_CMD0_BLOCK_COUNT		8
+#define  BM_SSP_CMD0_BLOCK_COUNT		(0xff << 8)
+#define  BP_SSP_CMD0_CMD			0
+#define  BM_SSP_CMD0_CMD			0xff
+#define HW_SSP_CMD1				0x020
+#define HW_SSP_XFER_SIZE			0x030
+#define HW_SSP_BLOCK_SIZE			0x040
+#define  BP_SSP_BLOCK_SIZE_BLOCK_COUNT		4
+#define  BM_SSP_BLOCK_SIZE_BLOCK_COUNT		(0xffffff << 4)
+#define  BP_SSP_BLOCK_SIZE_BLOCK_SIZE		0
+#define  BM_SSP_BLOCK_SIZE_BLOCK_SIZE		0xf
+#define HW_SSP_TIMING(h)			(ssp_is_old(h) ? 0x050 : 0x070)
+#define  BP_SSP_TIMING_TIMEOUT			16
+#define  BM_SSP_TIMING_TIMEOUT			(0xffff << 16)
+#define  BP_SSP_TIMING_CLOCK_DIVIDE		8
+#define  BM_SSP_TIMING_CLOCK_DIVIDE		(0xff << 8)
+#define  BP_SSP_TIMING_CLOCK_RATE		0
+#define  BM_SSP_TIMING_CLOCK_RATE		0xff
+#define HW_SSP_CTRL1(h)				(ssp_is_old(h) ? 0x060 : 0x080)
+#define  BM_SSP_CTRL1_SDIO_IRQ			(1 << 31)
+#define  BM_SSP_CTRL1_SDIO_IRQ_EN		(1 << 30)
+#define  BM_SSP_CTRL1_RESP_ERR_IRQ		(1 << 29)
+#define  BM_SSP_CTRL1_RESP_ERR_IRQ_EN		(1 << 28)
+#define  BM_SSP_CTRL1_RESP_TIMEOUT_IRQ		(1 << 27)
+#define  BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN	(1 << 26)
+#define  BM_SSP_CTRL1_DATA_TIMEOUT_IRQ		(1 << 25)
+#define  BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN	(1 << 24)
+#define  BM_SSP_CTRL1_DATA_CRC_IRQ		(1 << 23)
+#define  BM_SSP_CTRL1_DATA_CRC_IRQ_EN		(1 << 22)
+#define  BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ		(1 << 21)
+#define  BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ_EN	(1 << 20)
+#define  BM_SSP_CTRL1_RECV_TIMEOUT_IRQ		(1 << 17)
+#define  BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN	(1 << 16)
+#define  BM_SSP_CTRL1_FIFO_OVERRUN_IRQ		(1 << 15)
+#define  BM_SSP_CTRL1_FIFO_OVERRUN_IRQ_EN	(1 << 14)
+#define  BM_SSP_CTRL1_DMA_ENABLE		(1 << 13)
+#define  BM_SSP_CTRL1_POLARITY			(1 << 9)
+#define  BP_SSP_CTRL1_WORD_LENGTH		4
+#define  BM_SSP_CTRL1_WORD_LENGTH		(0xf << 4)
+#define  BP_SSP_CTRL1_SSP_MODE			0
+#define  BM_SSP_CTRL1_SSP_MODE			0xf
+#define HW_SSP_SDRESP0(h)			(ssp_is_old(h) ? 0x080 : 0x0a0)
+#define HW_SSP_SDRESP1(h)			(ssp_is_old(h) ? 0x090 : 0x0b0)
+#define HW_SSP_SDRESP2(h)			(ssp_is_old(h) ? 0x0a0 : 0x0c0)
+#define HW_SSP_SDRESP3(h)			(ssp_is_old(h) ? 0x0b0 : 0x0d0)
+#define HW_SSP_STATUS(h)			(ssp_is_old(h) ? 0x0c0 : 0x100)
+#define  BM_SSP_STATUS_CARD_DETECT		(1 << 28)
+#define  BM_SSP_STATUS_SDIO_IRQ			(1 << 17)
+
+#define BF_SSP(value, field)	(((value) << BP_SSP_##field) & BM_SSP_##field)
+
+#define SSP_PIO_NUM	3
+
+enum mxs_mmc_id {
+	IMX23_MMC,
+	IMX28_MMC,
+};
+
+#endif	/* __LINUX_SPI_MXS_SPI_H__ */
-- 
1.7.10

[PATCH 2/7] ARM: mxs: Rename IMX2[38]_MMC to IMX2[38]_SSP

[Marek Vasut]

Since the SSP controller can act as both SPI and MMC host,
renaming the enum to properly reflect the naming seems
appropriate.

Based on previous attempt by:
Fabio Estevam <fabio.estevam@freescale.com>

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <cjb@laptop.org>
Cc: Detlev Zundel <dzu@denx.de>
CC: Dong Aisheng <b29396@freescale.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linux ARM kernel <linux-arm-kernel@lists.infradead.org>
Cc: Rob Herring <rob.herring@calxeda.com>
CC: Shawn Guo <shawn.guo@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
---
 drivers/mmc/host/mxs-mmc.c  |   18 +++++++++---------
 include/linux/spi/mxs-spi.h |    8 ++++----
 2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index 6a14e10..97d3df2 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -78,7 +78,7 @@ struct mxs_mmc_host {
 	enum dma_transfer_direction	slave_dirn;
 	u32				ssp_pio_words[SSP_PIO_NUM];
 
-	enum mxs_mmc_id			devid;
+	enum mxs_ssp_id			devid;
 	unsigned char			bus_width;
 	spinlock_t			lock;
 	int				sdio_irq_en;
@@ -601,22 +601,22 @@ static bool mxs_mmc_dma_filter(struct dma_chan *chan, void *param)
 	return true;
 }
 
-static struct platform_device_id mxs_mmc_ids[] = {
+static struct platform_device_id mxs_ssp_ids[] = {
 	{
 		.name = "imx23-mmc",
-		.driver_data = IMX23_MMC,
+		.driver_data = IMX23_SSP,
 	}, {
 		.name = "imx28-mmc",
-		.driver_data = IMX28_MMC,
+		.driver_data = IMX28_SSP,
 	}, {
 		/* sentinel */
 	}
 };
-MODULE_DEVICE_TABLE(platform, mxs_mmc_ids);
+MODULE_DEVICE_TABLE(platform, mxs_ssp_ids);
 
 static const struct of_device_id mxs_mmc_dt_ids[] = {
-	{ .compatible = "fsl,imx23-mmc", .data = (void *) IMX23_MMC, },
-	{ .compatible = "fsl,imx28-mmc", .data = (void *) IMX28_MMC, },
+	{ .compatible = "fsl,imx23-mmc", .data = (void *) IMX23_SSP, },
+	{ .compatible = "fsl,imx28-mmc", .data = (void *) IMX28_SSP, },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, mxs_mmc_dt_ids);
@@ -654,7 +654,7 @@ static int mxs_mmc_probe(struct platform_device *pdev)
 	}
 
 	if (np) {
-		host->devid = (enum mxs_mmc_id) of_id->data;
+		host->devid = (enum mxs_ssp_id) of_id->data;
 		/*
 		 * TODO: This is a temporary solution and should be changed
 		 * to use generic DMA binding later when the helpers get in.
@@ -818,7 +818,7 @@ static const struct dev_pm_ops mxs_mmc_pm_ops = {
 static struct platform_driver mxs_mmc_driver = {
 	.probe		= mxs_mmc_probe,
 	.remove		= mxs_mmc_remove,
-	.id_table	= mxs_mmc_ids,
+	.id_table	= mxs_ssp_ids,
 	.driver		= {
 		.name	= DRIVER_NAME,
 		.owner	= THIS_MODULE,
diff --git a/include/linux/spi/mxs-spi.h b/include/linux/spi/mxs-spi.h
index b7ccd57..c08aef5 100644
--- a/include/linux/spi/mxs-spi.h
+++ b/include/linux/spi/mxs-spi.h
@@ -24,7 +24,7 @@
 #ifndef __LINUX_SPI_MXS_SPI_H__
 #define __LINUX_SPI_MXS_SPI_H__
 
-#define ssp_is_old(host)	((host)->devid == IMX23_MMC)
+#define ssp_is_old(host)	((host)->devid == IMX23_SSP)
 
 /* SSP registers */
 #define HW_SSP_CTRL0				0x000
@@ -101,9 +101,9 @@
 
 #define SSP_PIO_NUM	3
 
-enum mxs_mmc_id {
-	IMX23_MMC,
-	IMX28_MMC,
+enum mxs_ssp_id {
+	IMX23_SSP,
+	IMX28_SSP,
 };
 
 #endif	/* __LINUX_SPI_MXS_SPI_H__ */
-- 
1.7.10

[PATCH 3/7] ARM: mxs: Add necessary bits into mxs-spi.h

[Marek Vasut]

Add missing register bits and registers into mxs-spi.h .
These will be used by the SPI driver.

Based on previous attempt by:
Fabio Estevam <fabio.estevam@freescale.com>

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <cjb@laptop.org>
Cc: Detlev Zundel <dzu@denx.de>
CC: Dong Aisheng <b29396@freescale.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linux ARM kernel <linux-arm-kernel@lists.infradead.org>
Cc: Rob Herring <rob.herring@calxeda.com>
CC: Shawn Guo <shawn.guo@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
---
 include/linux/spi/mxs-spi.h |   22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/include/linux/spi/mxs-spi.h b/include/linux/spi/mxs-spi.h
index c08aef5..b0a0335 100644
--- a/include/linux/spi/mxs-spi.h
+++ b/include/linux/spi/mxs-spi.h
@@ -30,12 +30,14 @@
 #define HW_SSP_CTRL0				0x000
 #define  BM_SSP_CTRL0_RUN			(1 << 29)
 #define  BM_SSP_CTRL0_SDIO_IRQ_CHECK		(1 << 28)
+#define  BM_SSP_CTRL0_LOCK_CS			(1 << 27)
 #define  BM_SSP_CTRL0_IGNORE_CRC		(1 << 26)
 #define  BM_SSP_CTRL0_READ			(1 << 25)
 #define  BM_SSP_CTRL0_DATA_XFER			(1 << 24)
 #define  BP_SSP_CTRL0_BUS_WIDTH			22
 #define  BM_SSP_CTRL0_BUS_WIDTH			(0x3 << 22)
 #define  BM_SSP_CTRL0_WAIT_FOR_IRQ		(1 << 21)
+#define  BM_SSP_CTRL0_WAIT_FOR_CMD		(1 << 20)
 #define  BM_SSP_CTRL0_LONG_RESP			(1 << 19)
 #define  BM_SSP_CTRL0_GET_RESP			(1 << 17)
 #define  BM_SSP_CTRL0_ENABLE			(1 << 16)
@@ -64,8 +66,12 @@
 #define  BM_SSP_TIMING_TIMEOUT			(0xffff << 16)
 #define  BP_SSP_TIMING_CLOCK_DIVIDE		8
 #define  BM_SSP_TIMING_CLOCK_DIVIDE		(0xff << 8)
+#define  BF_SSP_TIMING_CLOCK_DIVIDE(v)		\
+			(((v) << 8) & BM_SSP_TIMING_CLOCK_DIVIDE)
 #define  BP_SSP_TIMING_CLOCK_RATE		0
 #define  BM_SSP_TIMING_CLOCK_RATE		0xff
+#define BF_SSP_TIMING_CLOCK_RATE(v)		\
+			(((v) << 0) & BM_SSP_TIMING_CLOCK_RATE)
 #define HW_SSP_CTRL1(h)				(ssp_is_old(h) ? 0x060 : 0x080)
 #define  BM_SSP_CTRL1_SDIO_IRQ			(1 << 31)
 #define  BM_SSP_CTRL1_SDIO_IRQ_EN		(1 << 30)
@@ -84,11 +90,26 @@
 #define  BM_SSP_CTRL1_FIFO_OVERRUN_IRQ		(1 << 15)
 #define  BM_SSP_CTRL1_FIFO_OVERRUN_IRQ_EN	(1 << 14)
 #define  BM_SSP_CTRL1_DMA_ENABLE		(1 << 13)
+#define  BM_SSP_CTRL1_PHASE			(1 << 10)
 #define  BM_SSP_CTRL1_POLARITY			(1 << 9)
 #define  BP_SSP_CTRL1_WORD_LENGTH		4
 #define  BM_SSP_CTRL1_WORD_LENGTH		(0xf << 4)
+#define  BF_SSP_CTRL1_WORD_LENGTH(v)		\
+			(((v) << 4) & BM_SSP_CTRL1_WORD_LENGTH)
+#define  BV_SSP_CTRL1_WORD_LENGTH__FOUR_BITS	0x3
+#define  BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS	0x7
+#define  BV_SSP_CTRL1_WORD_LENGTH__SIXTEEN_BITS	0xF
 #define  BP_SSP_CTRL1_SSP_MODE			0
 #define  BM_SSP_CTRL1_SSP_MODE			0xf
+#define  BF_SSP_CTRL1_SSP_MODE(v)		\
+			(((v) << 0) & BM_SSP_CTRL1_SSP_MODE)
+#define  BV_SSP_CTRL1_SSP_MODE__SPI		0x0
+#define  BV_SSP_CTRL1_SSP_MODE__SSI		0x1
+#define  BV_SSP_CTRL1_SSP_MODE__SD_MMC		0x3
+#define  BV_SSP_CTRL1_SSP_MODE__MS		0x4
+
+#define HW_SSP_DATA				0x090
+
 #define HW_SSP_SDRESP0(h)			(ssp_is_old(h) ? 0x080 : 0x0a0)
 #define HW_SSP_SDRESP1(h)			(ssp_is_old(h) ? 0x090 : 0x0b0)
 #define HW_SSP_SDRESP2(h)			(ssp_is_old(h) ? 0x0a0 : 0x0c0)
@@ -96,6 +117,7 @@
 #define HW_SSP_STATUS(h)			(ssp_is_old(h) ? 0x0c0 : 0x100)
 #define  BM_SSP_STATUS_CARD_DETECT		(1 << 28)
 #define  BM_SSP_STATUS_SDIO_IRQ			(1 << 17)
+#define  BM_SSP_STATUS_FIFO_EMPTY		(1 << 5)
 
 #define BF_SSP(value, field)	(((value) << BP_SSP_##field) & BM_SSP_##field)
 
-- 
1.7.10

[PATCH 4/7] ARM: mxs: Add SPI clock into clk framwork

[Marek Vasut]

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <cjb@laptop.org>
Cc: Detlev Zundel <dzu@denx.de>
CC: Dong Aisheng <b29396@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linux ARM kernel <linux-arm-kernel@lists.infradead.org>
Cc: Rob Herring <rob.herring@calxeda.com>
CC: Shawn Guo <shawn.guo@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
---
 drivers/clk/mxs/clk-imx28.c |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index 003b0f3..d22b926 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -149,21 +149,25 @@ static struct clk_lookup xbus_lookups[] __initdata = {
 
 static struct clk_lookup ssp0_lookups[] __initdata = {
 	{ .dev_id = "imx28-mmc.0", },
+	{ .dev_id = "imx28-spi.0", },
 	{ .dev_id = "80010000.ssp", },
 };
 
 static struct clk_lookup ssp1_lookups[] __initdata = {
 	{ .dev_id = "imx28-mmc.1", },
+	{ .dev_id = "imx28-spi.1", },
 	{ .dev_id = "80012000.ssp", },
 };
 
 static struct clk_lookup ssp2_lookups[] __initdata = {
 	{ .dev_id = "imx28-mmc.2", },
+	{ .dev_id = "imx28-spi.2", },
 	{ .dev_id = "80014000.ssp", },
 };
 
 static struct clk_lookup ssp3_lookups[] __initdata = {
 	{ .dev_id = "imx28-mmc.3", },
+	{ .dev_id = "imx28-spi.3", },
 	{ .dev_id = "80016000.ssp", },
 };
 
-- 
1.7.10

Re: [PATCH 4/7] ARM: mxs: Add SPI clock into clk framwork

[Shawn Guo]

On Sat, Jun 23, 2012 at 08:43:50PM +0200, Marek Vasut wrote:
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chris Ball <cjb@laptop.org>
> Cc: Detlev Zundel <dzu@denx.de>
> CC: Dong Aisheng <b29396@freescale.com>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Linux ARM kernel <linux-arm-kernel@lists.infradead.org>
> Cc: Rob Herring <rob.herring@calxeda.com>
> CC: Shawn Guo <shawn.guo@linaro.org>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Wolfgang Denk <wd@denx.de>
> ---
>  drivers/clk/mxs/clk-imx28.c |    4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
> index 003b0f3..d22b926 100644
> --- a/drivers/clk/mxs/clk-imx28.c
> +++ b/drivers/clk/mxs/clk-imx28.c
> @@ -149,21 +149,25 @@ static struct clk_lookup xbus_lookups[] __initdata = {
>  
>  static struct clk_lookup ssp0_lookups[] __initdata = {
>  	{ .dev_id = "imx28-mmc.0", },
> +	{ .dev_id = "imx28-spi.0", },
>  	{ .dev_id = "80010000.ssp", },
>  };
>  
>  static struct clk_lookup ssp1_lookups[] __initdata = {
>  	{ .dev_id = "imx28-mmc.1", },
> +	{ .dev_id = "imx28-spi.1", },
>  	{ .dev_id = "80012000.ssp", },
>  };
>  
>  static struct clk_lookup ssp2_lookups[] __initdata = {
>  	{ .dev_id = "imx28-mmc.2", },
> +	{ .dev_id = "imx28-spi.2", },
>  	{ .dev_id = "80014000.ssp", },
>  };
>  
>  static struct clk_lookup ssp3_lookups[] __initdata = {
>  	{ .dev_id = "imx28-mmc.3", },
> +	{ .dev_id = "imx28-spi.3", },
>  	{ .dev_id = "80016000.ssp", },
>  };

These changes should not be needed, as the driver will only be probed
from device tree.

-- 
Regards,
Shawn

Re: [PATCH 4/7] ARM: mxs: Add SPI clock into clk framwork

[Marek Vasut]

Dear Shawn Guo,

> On Sat, Jun 23, 2012 at 08:43:50PM +0200, Marek Vasut wrote:
> > Signed-off-by: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
> > Cc: Chris Ball <cjb-2X9k7bc8m7Mdnm+yROfE0A@public.gmane.org>
> > Cc: Detlev Zundel <dzu-ynQEQJNshbs@public.gmane.org>
> > CC: Dong Aisheng <b29396-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> > Cc: Fabio Estevam <fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> > Cc: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
> > Cc: Linux ARM kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
> > Cc: Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
> > CC: Shawn Guo <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> > Cc: Stefano Babic <sbabic-ynQEQJNshbs@public.gmane.org>
> > Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
> > ---
> > 
> >  drivers/clk/mxs/clk-imx28.c |    4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
> > index 003b0f3..d22b926 100644
> > --- a/drivers/clk/mxs/clk-imx28.c
> > +++ b/drivers/clk/mxs/clk-imx28.c
> > @@ -149,21 +149,25 @@ static struct clk_lookup xbus_lookups[] __initdata
> > = {
> > 
> >  static struct clk_lookup ssp0_lookups[] __initdata = {
> >  
> >  	{ .dev_id = "imx28-mmc.0", },
> > 
> > +	{ .dev_id = "imx28-spi.0", },
> > 
> >  	{ .dev_id = "80010000.ssp", },
> >  
> >  };
> >  
> >  static struct clk_lookup ssp1_lookups[] __initdata = {
> >  
> >  	{ .dev_id = "imx28-mmc.1", },
> > 
> > +	{ .dev_id = "imx28-spi.1", },
> > 
> >  	{ .dev_id = "80012000.ssp", },
> >  
> >  };
> >  
> >  static struct clk_lookup ssp2_lookups[] __initdata = {
> >  
> >  	{ .dev_id = "imx28-mmc.2", },
> > 
> > +	{ .dev_id = "imx28-spi.2", },
> > 
> >  	{ .dev_id = "80014000.ssp", },
> >  
> >  };
> >  
> >  static struct clk_lookup ssp3_lookups[] __initdata = {
> >  
> >  	{ .dev_id = "imx28-mmc.3", },
> > 
> > +	{ .dev_id = "imx28-spi.3", },
> > 
> >  	{ .dev_id = "80016000.ssp", },
> >  
> >  };
> 
> These changes should not be needed, as the driver will only be probed
> from device tree.

So why are those imx28-mmc there ? Shall these not be removed then ?

Best regards,
Marek Vasut

------------------------------------------------------------------------------
Live Security Virtual Conference
Exclusive live event will cover all the ways today's security and 
threat landscape has changed and how IT managers can respond. Discussions 
will include endpoint security, mobile security and the latest in malware 
threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/

Re: [PATCH 4/7] ARM: mxs: Add SPI clock into clk framwork

[Shawn Guo]

On Tue, Jun 26, 2012 at 02:16:11PM +0200, Marek Vasut wrote:
> So why are those imx28-mmc there ? Shall these not be removed then ?
> 
They are still needed by those non-DT board files.  Once we have those
board files removed, these imx28-mmc lookups will not be needed any
longer.

-- 
Regards,
Shawn

Re: [PATCH 4/7] ARM: mxs: Add SPI clock into clk framwork

[Marek Vasut]

Dear Shawn Guo,

> On Tue, Jun 26, 2012 at 02:16:11PM +0200, Marek Vasut wrote:
> > So why are those imx28-mmc there ? Shall these not be removed then ?
> 
> They are still needed by those non-DT board files.  Once we have those
> board files removed, these imx28-mmc lookups will not be needed any
> longer.

Ah ok, I'll discard this patch then.

Best regards,
Marek Vasut

------------------------------------------------------------------------------
Live Security Virtual Conference
Exclusive live event will cover all the ways today's security and 
threat landscape has changed and how IT managers can respond. Discussions 
will include endpoint security, mobile security and the latest in malware 
threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/

[PATCH 5/7] ARM: mxs: Pull out parts shared between MMC and SPI

[Marek Vasut]

Abstract out the common part of private data shared between MMC
and SPI. These shall later allow to use common clock configuration
function.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <cjb@laptop.org>
Cc: Detlev Zundel <dzu@denx.de>
CC: Dong Aisheng <b29396@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linux ARM kernel <linux-arm-kernel@lists.infradead.org>
Cc: Rob Herring <rob.herring@calxeda.com>
CC: Shawn Guo <shawn.guo@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
---
 drivers/mmc/host/mxs-mmc.c  |  107 ++++++++++++++++++++++++-------------------
 include/linux/spi/mxs-spi.h |    8 ++++
 2 files changed, 67 insertions(+), 48 deletions(-)

diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index 97d3df2..d5f2421 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -62,23 +62,20 @@
 #define MXS_MMC_DETECT_TIMEOUT			(HZ/2)
 
 struct mxs_mmc_host {
+	struct mxs_ssp			ssp;
+
 	struct mmc_host			*mmc;
 	struct mmc_request		*mrq;
 	struct mmc_command		*cmd;
 	struct mmc_data			*data;
 
-	void __iomem			*base;
 	int				dma_channel;
-	struct clk			*clk;
-	unsigned int			clk_rate;
-
 	struct dma_chan         	*dmach;
 	struct mxs_dma_data		dma_data;
 	unsigned int			dma_dir;
 	enum dma_transfer_direction	slave_dirn;
 	u32				ssp_pio_words[SSP_PIO_NUM];
 
-	enum mxs_ssp_id			devid;
 	unsigned char			bus_width;
 	spinlock_t			lock;
 	int				sdio_irq_en;
@@ -105,16 +102,18 @@ static int mxs_mmc_get_ro(struct mmc_host *mmc)
 static int mxs_mmc_get_cd(struct mmc_host *mmc)
 {
 	struct mxs_mmc_host *host = mmc_priv(mmc);
+	struct mxs_ssp *ssp = &host->ssp;
 
-	return !(readl(host->base + HW_SSP_STATUS(host)) &
+	return !(readl(ssp->base + HW_SSP_STATUS(ssp)) &
 		 BM_SSP_STATUS_CARD_DETECT);
 }
 
 static void mxs_mmc_reset(struct mxs_mmc_host *host)
 {
+	struct mxs_ssp *ssp = &host->ssp;
 	u32 ctrl0, ctrl1;
 
-	stmp_reset_block(host->base);
+	stmp_reset_block(ssp->base);
 
 	ctrl0 = BM_SSP_CTRL0_IGNORE_CRC;
 	ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) |
@@ -130,15 +129,15 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host)
 	writel(BF_SSP(0xffff, TIMING_TIMEOUT) |
 	       BF_SSP(2, TIMING_CLOCK_DIVIDE) |
 	       BF_SSP(0, TIMING_CLOCK_RATE),
-	       host->base + HW_SSP_TIMING(host));
+	       ssp->base + HW_SSP_TIMING(ssp));
 
 	if (host->sdio_irq_en) {
 		ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
 		ctrl1 |= BM_SSP_CTRL1_SDIO_IRQ_EN;
 	}
 
-	writel(ctrl0, host->base + HW_SSP_CTRL0);
-	writel(ctrl1, host->base + HW_SSP_CTRL1(host));
+	writel(ctrl0, ssp->base + HW_SSP_CTRL0);
+	writel(ctrl1, ssp->base + HW_SSP_CTRL1(ssp));
 }
 
 static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
@@ -149,15 +148,16 @@ static void mxs_mmc_request_done(struct mxs_mmc_host *host)
 	struct mmc_command *cmd = host->cmd;
 	struct mmc_data *data = host->data;
 	struct mmc_request *mrq = host->mrq;
+	struct mxs_ssp *ssp = &host->ssp;
 
 	if (mmc_resp_type(cmd) & MMC_RSP_PRESENT) {
 		if (mmc_resp_type(cmd) & MMC_RSP_136) {
-			cmd->resp[3] = readl(host->base + HW_SSP_SDRESP0(host));
-			cmd->resp[2] = readl(host->base + HW_SSP_SDRESP1(host));
-			cmd->resp[1] = readl(host->base + HW_SSP_SDRESP2(host));
-			cmd->resp[0] = readl(host->base + HW_SSP_SDRESP3(host));
+			cmd->resp[3] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
+			cmd->resp[2] = readl(ssp->base + HW_SSP_SDRESP1(ssp));
+			cmd->resp[1] = readl(ssp->base + HW_SSP_SDRESP2(ssp));
+			cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP3(ssp));
 		} else {
-			cmd->resp[0] = readl(host->base + HW_SSP_SDRESP0(host));
+			cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
 		}
 	}
 
@@ -196,13 +196,14 @@ static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)
 	struct mxs_mmc_host *host = dev_id;
 	struct mmc_command *cmd = host->cmd;
 	struct mmc_data *data = host->data;
+	struct mxs_ssp *ssp = &host->ssp;
 	u32 stat;
 
 	spin_lock(&host->lock);
 
-	stat = readl(host->base + HW_SSP_CTRL1(host));
+	stat = readl(ssp->base + HW_SSP_CTRL1(ssp));
 	writel(stat & MXS_MMC_IRQ_BITS,
-	       host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_CLR);
+	       ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_CLR);
 
 	if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN))
 		mmc_signal_sdio_irq(host->mmc);
@@ -366,6 +367,8 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host)
 	unsigned int data_size = 0, log2_blksz;
 	unsigned int blocks = data->blocks;
 
+	struct mxs_ssp *ssp = &host->ssp;
+
 	u32 ignore_crc, get_resp, long_resp, read;
 	u32 ctrl0, cmd0, cmd1, val;
 
@@ -408,15 +411,15 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host)
 		blocks = 1;
 
 	/* xfer count, block size and count need to be set differently */
-	if (ssp_is_old(host)) {
+	if (ssp_is_old(ssp)) {
 		ctrl0 |= BF_SSP(data_size, CTRL0_XFER_COUNT);
 		cmd0 |= BF_SSP(log2_blksz, CMD0_BLOCK_SIZE) |
 			BF_SSP(blocks - 1, CMD0_BLOCK_COUNT);
 	} else {
-		writel(data_size, host->base + HW_SSP_XFER_SIZE);
+		writel(data_size, ssp->base + HW_SSP_XFER_SIZE);
 		writel(BF_SSP(log2_blksz, BLOCK_SIZE_BLOCK_SIZE) |
 		       BF_SSP(blocks - 1, BLOCK_SIZE_BLOCK_COUNT),
-		       host->base + HW_SSP_BLOCK_SIZE);
+		       ssp->base + HW_SSP_BLOCK_SIZE);
 	}
 
 	if ((cmd->opcode == MMC_STOP_TRANSMISSION) ||
@@ -431,11 +434,11 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host)
 	}
 
 	/* set the timeout count */
-	timeout = mxs_ns_to_ssp_ticks(host->clk_rate, data->timeout_ns);
-	val = readl(host->base + HW_SSP_TIMING(host));
+	timeout = mxs_ns_to_ssp_ticks(ssp->clk_rate, data->timeout_ns);
+	val = readl(ssp->base + HW_SSP_TIMING(ssp));
 	val &= ~(BM_SSP_TIMING_TIMEOUT);
 	val |= BF_SSP(timeout, TIMING_TIMEOUT);
-	writel(val, host->base + HW_SSP_TIMING(host));
+	writel(val, ssp->base + HW_SSP_TIMING(ssp));
 
 	/* pio */
 	host->ssp_pio_words[0] = ctrl0;
@@ -500,11 +503,12 @@ static void mxs_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
 
 static void mxs_mmc_set_clk_rate(struct mxs_mmc_host *host, unsigned int rate)
 {
+	struct mxs_ssp *ssp = &host->ssp;
 	unsigned int ssp_clk, ssp_sck;
 	u32 clock_divide, clock_rate;
 	u32 val;
 
-	ssp_clk = clk_get_rate(host->clk);
+	ssp_clk = clk_get_rate(ssp->clk);
 
 	for (clock_divide = 2; clock_divide <= 254; clock_divide += 2) {
 		clock_rate = DIV_ROUND_UP(ssp_clk, rate * clock_divide);
@@ -521,13 +525,13 @@ static void mxs_mmc_set_clk_rate(struct mxs_mmc_host *host, unsigned int rate)
 
 	ssp_sck = ssp_clk / clock_divide / (1 + clock_rate);
 
-	val = readl(host->base + HW_SSP_TIMING(host));
+	val = readl(ssp->base + HW_SSP_TIMING(ssp));
 	val &= ~(BM_SSP_TIMING_CLOCK_DIVIDE | BM_SSP_TIMING_CLOCK_RATE);
 	val |= BF_SSP(clock_divide, TIMING_CLOCK_DIVIDE);
 	val |= BF_SSP(clock_rate, TIMING_CLOCK_RATE);
-	writel(val, host->base + HW_SSP_TIMING(host));
+	writel(val, ssp->base + HW_SSP_TIMING(ssp));
 
-	host->clk_rate = ssp_sck;
+	ssp->clk_rate = ssp_sck;
 
 	dev_dbg(mmc_dev(host->mmc),
 		"%s: clock_divide %d, clock_rate %d, ssp_clk %d, rate_actual %d, rate_requested %d\n",
@@ -552,6 +556,7 @@ static void mxs_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
 {
 	struct mxs_mmc_host *host = mmc_priv(mmc);
+	struct mxs_ssp *ssp = &host->ssp;
 	unsigned long flags;
 
 	spin_lock_irqsave(&host->lock, flags);
@@ -560,19 +565,19 @@ static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
 
 	if (enable) {
 		writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
-		       host->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
+		       ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
 		writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
-		       host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_SET);
+		       ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_SET);
 
-		if (readl(host->base + HW_SSP_STATUS(host)) &
+		if (readl(ssp->base + HW_SSP_STATUS(ssp)) &
 				BM_SSP_STATUS_SDIO_IRQ)
 			mmc_signal_sdio_irq(host->mmc);
 
 	} else {
 		writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
-		       host->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
+		       ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
 		writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
-		       host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_CLR);
+		       ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_CLR);
 	}
 
 	spin_unlock_irqrestore(&host->lock, flags);
@@ -634,6 +639,7 @@ static int mxs_mmc_probe(struct platform_device *pdev)
 	int ret = 0, irq_err, irq_dma;
 	dma_cap_mask_t mask;
 	enum of_gpio_flags flags;
+	struct mxs_ssp *ssp;
 
 	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
@@ -647,14 +653,16 @@ static int mxs_mmc_probe(struct platform_device *pdev)
 		return -ENOMEM;
 
 	host = mmc_priv(mmc);
-	host->base = devm_request_and_ioremap(&pdev->dev, iores);
-	if (!host->base) {
+	ssp = &host->ssp;
+	ssp->dev = &pdev->dev;
+	ssp->base = devm_request_and_ioremap(&pdev->dev, iores);
+	if (!ssp->base) {
 		ret = -EADDRNOTAVAIL;
 		goto out_mmc_free;
 	}
 
 	if (np) {
-		host->devid = (enum mxs_ssp_id) of_id->data;
+		ssp->devid = (enum mxs_ssp_id) of_id->data;
 		/*
 		 * TODO: This is a temporary solution and should be changed
 		 * to use generic DMA binding later when the helpers get in.
@@ -667,7 +675,7 @@ static int mxs_mmc_probe(struct platform_device *pdev)
 			goto out_mmc_free;
 		}
 	} else {
-		host->devid = pdev->id_entry->driver_data;
+		ssp->devid = pdev->id_entry->driver_data;
 		host->dma_channel = dmares->start;
 	}
 
@@ -680,12 +688,12 @@ static int mxs_mmc_probe(struct platform_device *pdev)
 		goto out_mmc_free;
 	}
 
-	host->clk = clk_get(&pdev->dev, NULL);
-	if (IS_ERR(host->clk)) {
-		ret = PTR_ERR(host->clk);
+	ssp->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(ssp->clk)) {
+		ret = PTR_ERR(ssp->clk);
 		goto out_mmc_free;
 	}
-	clk_prepare_enable(host->clk);
+	clk_prepare_enable(ssp->clk);
 
 	mxs_mmc_reset(host);
 
@@ -730,8 +738,8 @@ static int mxs_mmc_probe(struct platform_device *pdev)
 
 	mmc->max_segs = 52;
 	mmc->max_blk_size = 1 << 0xf;
-	mmc->max_blk_count = (ssp_is_old(host)) ? 0xff : 0xffffff;
-	mmc->max_req_size = (ssp_is_old(host)) ? 0xffff : 0xffffffff;
+	mmc->max_blk_count = (ssp_is_old(ssp)) ? 0xff : 0xffffff;
+	mmc->max_req_size = (ssp_is_old(ssp)) ? 0xffff : 0xffffffff;
 	mmc->max_seg_size = dma_get_max_seg_size(host->dmach->device->dev);
 
 	platform_set_drvdata(pdev, mmc);
@@ -755,8 +763,8 @@ out_free_dma:
 	if (host->dmach)
 		dma_release_channel(host->dmach);
 out_clk_put:
-	clk_disable_unprepare(host->clk);
-	clk_put(host->clk);
+	clk_disable_unprepare(ssp->clk);
+	clk_put(ssp->clk);
 out_mmc_free:
 	mmc_free_host(mmc);
 	return ret;
@@ -766,6 +774,7 @@ static int mxs_mmc_remove(struct platform_device *pdev)
 {
 	struct mmc_host *mmc = platform_get_drvdata(pdev);
 	struct mxs_mmc_host *host = mmc_priv(mmc);
+	struct mxs_ssp *ssp = &host->ssp;
 
 	mmc_remove_host(mmc);
 
@@ -774,8 +783,8 @@ static int mxs_mmc_remove(struct platform_device *pdev)
 	if (host->dmach)
 		dma_release_channel(host->dmach);
 
-	clk_disable_unprepare(host->clk);
-	clk_put(host->clk);
+	clk_disable_unprepare(ssp->clk);
+	clk_put(ssp->clk);
 
 	mmc_free_host(mmc);
 
@@ -787,11 +796,12 @@ static int mxs_mmc_suspend(struct device *dev)
 {
 	struct mmc_host *mmc = dev_get_drvdata(dev);
 	struct mxs_mmc_host *host = mmc_priv(mmc);
+	struct mxs_ssp *ssp = &host->ssp;
 	int ret = 0;
 
 	ret = mmc_suspend_host(mmc);
 
-	clk_disable_unprepare(host->clk);
+	clk_disable_unprepare(ssp->clk);
 
 	return ret;
 }
@@ -800,9 +810,10 @@ static int mxs_mmc_resume(struct device *dev)
 {
 	struct mmc_host *mmc = dev_get_drvdata(dev);
 	struct mxs_mmc_host *host = mmc_priv(mmc);
+	struct mxs_ssp *ssp = &host->ssp;
 	int ret = 0;
 
-	clk_prepare_enable(host->clk);
+	clk_prepare_enable(ssp->clk);
 
 	ret = mmc_resume_host(mmc);
 
diff --git a/include/linux/spi/mxs-spi.h b/include/linux/spi/mxs-spi.h
index b0a0335..0cb2767 100644
--- a/include/linux/spi/mxs-spi.h
+++ b/include/linux/spi/mxs-spi.h
@@ -128,4 +128,12 @@ enum mxs_ssp_id {
 	IMX28_SSP,
 };
 
+struct mxs_ssp {
+	struct device			*dev;
+	void __iomem			*base;
+	struct clk			*clk;
+	unsigned int			clk_rate;
+	enum mxs_ssp_id			devid;
+};
+
 #endif	/* __LINUX_SPI_MXS_SPI_H__ */
-- 
1.7.10

[PATCH 6/7] ARM: mxs: Pull out the SSP clock configuration function

[Marek Vasut]

Pull out the MMC clock configuration function and make it
into SSP clock configuration function, so it can be used by
the SPI driver too.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <cjb@laptop.org>
Cc: Detlev Zundel <dzu@denx.de>
CC: Dong Aisheng <b29396@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linux ARM kernel <linux-arm-kernel@lists.infradead.org>
Cc: Rob Herring <rob.herring@calxeda.com>
CC: Shawn Guo <shawn.guo@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
---
 drivers/clk/mxs/Makefile    |    2 +-
 drivers/clk/mxs/clk-ssp.c   |   61 +++++++++++++++++++++++++++++++++++++++++++
 drivers/mmc/host/mxs-mmc.c  |   39 +--------------------------
 include/linux/spi/mxs-spi.h |    2 ++
 4 files changed, 65 insertions(+), 39 deletions(-)
 create mode 100644 drivers/clk/mxs/clk-ssp.c

diff --git a/drivers/clk/mxs/Makefile b/drivers/clk/mxs/Makefile
index 7bedeec..a6a2223 100644
--- a/drivers/clk/mxs/Makefile
+++ b/drivers/clk/mxs/Makefile
@@ -2,7 +2,7 @@
 # Makefile for mxs specific clk
 #
 
-obj-y += clk.o clk-pll.o clk-ref.o clk-div.o clk-frac.o
+obj-y += clk.o clk-pll.o clk-ref.o clk-div.o clk-frac.o clk-ssp.o
 
 obj-$(CONFIG_SOC_IMX23) += clk-imx23.o
 obj-$(CONFIG_SOC_IMX28) += clk-imx28.o
diff --git a/drivers/clk/mxs/clk-ssp.c b/drivers/clk/mxs/clk-ssp.c
new file mode 100644
index 0000000..b3c1e16
--- /dev/null
+++ b/drivers/clk/mxs/clk-ssp.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright 2012 DENX Software Engineering, GmbH
+ *
+ * Pulled from code:
+ * Portions copyright (C) 2003 Russell King, PXA MMCI Driver
+ * Portions copyright (C) 2004-2005 Pierre Ossman, W83L51xD SD/MMC driver
+ *
+ * Copyright 2008 Embedded Alley Solutions, Inc.
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/io.h>
+#include <linux/spi/mxs-spi.h>
+
+void mxs_ssp_set_clk_rate(struct mxs_ssp *ssp, unsigned int rate)
+{
+	unsigned int ssp_clk, ssp_sck;
+	u32 clock_divide, clock_rate;
+	u32 val;
+
+	ssp_clk = clk_get_rate(ssp->clk);
+
+	for (clock_divide = 2; clock_divide <= 254; clock_divide += 2) {
+		clock_rate = DIV_ROUND_UP(ssp_clk, rate * clock_divide);
+		clock_rate = (clock_rate > 0) ? clock_rate - 1 : 0;
+		if (clock_rate <= 255)
+			break;
+	}
+
+	if (clock_divide > 254) {
+		dev_err(ssp->dev,
+			"%s: cannot set clock to %d\n", __func__, rate);
+		return;
+	}
+
+	ssp_sck = ssp_clk / clock_divide / (1 + clock_rate);
+
+	val = readl(ssp->base + HW_SSP_TIMING(ssp));
+	val &= ~(BM_SSP_TIMING_CLOCK_DIVIDE | BM_SSP_TIMING_CLOCK_RATE);
+	val |= BF_SSP(clock_divide, TIMING_CLOCK_DIVIDE);
+	val |= BF_SSP(clock_rate, TIMING_CLOCK_RATE);
+	writel(val, ssp->base + HW_SSP_TIMING(ssp));
+
+	ssp->clk_rate = ssp_sck;
+
+	dev_dbg(ssp->dev,
+		"%s: clock_divide %d, clock_rate %d, ssp_clk %d, rate_actual %d, rate_requested %d\n",
+		__func__, clock_divide, clock_rate, ssp_clk, ssp_sck, rate);
+}
diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index d5f2421..7701e08 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -501,43 +501,6 @@ static void mxs_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
 	mxs_mmc_start_cmd(host, mrq->cmd);
 }
 
-static void mxs_mmc_set_clk_rate(struct mxs_mmc_host *host, unsigned int rate)
-{
-	struct mxs_ssp *ssp = &host->ssp;
-	unsigned int ssp_clk, ssp_sck;
-	u32 clock_divide, clock_rate;
-	u32 val;
-
-	ssp_clk = clk_get_rate(ssp->clk);
-
-	for (clock_divide = 2; clock_divide <= 254; clock_divide += 2) {
-		clock_rate = DIV_ROUND_UP(ssp_clk, rate * clock_divide);
-		clock_rate = (clock_rate > 0) ? clock_rate - 1 : 0;
-		if (clock_rate <= 255)
-			break;
-	}
-
-	if (clock_divide > 254) {
-		dev_err(mmc_dev(host->mmc),
-			"%s: cannot set clock to %d\n", __func__, rate);
-		return;
-	}
-
-	ssp_sck = ssp_clk / clock_divide / (1 + clock_rate);
-
-	val = readl(ssp->base + HW_SSP_TIMING(ssp));
-	val &= ~(BM_SSP_TIMING_CLOCK_DIVIDE | BM_SSP_TIMING_CLOCK_RATE);
-	val |= BF_SSP(clock_divide, TIMING_CLOCK_DIVIDE);
-	val |= BF_SSP(clock_rate, TIMING_CLOCK_RATE);
-	writel(val, ssp->base + HW_SSP_TIMING(ssp));
-
-	ssp->clk_rate = ssp_sck;
-
-	dev_dbg(mmc_dev(host->mmc),
-		"%s: clock_divide %d, clock_rate %d, ssp_clk %d, rate_actual %d, rate_requested %d\n",
-		__func__, clock_divide, clock_rate, ssp_clk, ssp_sck, rate);
-}
-
 static void mxs_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 {
 	struct mxs_mmc_host *host = mmc_priv(mmc);
@@ -550,7 +513,7 @@ static void mxs_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 		host->bus_width = 0;
 
 	if (ios->clock)
-		mxs_mmc_set_clk_rate(host, ios->clock);
+		mxs_ssp_set_clk_rate(&host->ssp, ios->clock);
 }
 
 static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
diff --git a/include/linux/spi/mxs-spi.h b/include/linux/spi/mxs-spi.h
index 0cb2767..2bc8abb 100644
--- a/include/linux/spi/mxs-spi.h
+++ b/include/linux/spi/mxs-spi.h
@@ -136,4 +136,6 @@ struct mxs_ssp {
 	enum mxs_ssp_id			devid;
 };
 
+void mxs_ssp_set_clk_rate(struct mxs_ssp *ssp, unsigned int rate);
+
 #endif	/* __LINUX_SPI_MXS_SPI_H__ */
-- 
1.7.10

[PATCH 7/7] ARM: mxs: Add SPI driver for mx233/mx28

[Marek Vasut]

This is slightly reworked version of the SPI driver.
Support for DT has been added and it's been converted
to queued API.

Based on previous attempt by:
Fabio Estevam <fabio.estevam@freescale.com>

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <cjb@laptop.org>
Cc: Detlev Zundel <dzu@denx.de>
CC: Dong Aisheng <b29396@freescale.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linux ARM kernel <linux-arm-kernel@lists.infradead.org>
Cc: Rob Herring <rob.herring@calxeda.com>
CC: Shawn Guo <shawn.guo@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
---
 drivers/spi/Kconfig   |    6 +
 drivers/spi/Makefile  |    1 +
 drivers/spi/spi-mxs.c |  407 +++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 414 insertions(+)
 create mode 100644 drivers/spi/spi-mxs.c

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index cd2fe35..85ca6a7 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -355,6 +355,12 @@ config SPI_STMP3XXX
 	help
 	  SPI driver for Freescale STMP37xx/378x SoC SSP interface
 
+config SPI_MXS
+	tristate "Freescale MXS SPI controller"
+	depends on ARCH_MXS
+	help
+	  SPI driver for Freescale MXS devices.
+
 config SPI_TEGRA
 	tristate "Nvidia Tegra SPI controller"
 	depends on ARCH_TEGRA && TEGRA_SYSTEM_DMA
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 9d75d21..a684d1e 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_SPI_LM70_LLP)		+= spi-lm70llp.o
 obj-$(CONFIG_SPI_MPC512x_PSC)		+= spi-mpc512x-psc.o
 obj-$(CONFIG_SPI_MPC52xx_PSC)		+= spi-mpc52xx-psc.o
 obj-$(CONFIG_SPI_MPC52xx)		+= spi-mpc52xx.o
+obj-$(CONFIG_SPI_MXS)			+= spi-mxs.o
 obj-$(CONFIG_SPI_NUC900)		+= spi-nuc900.o
 obj-$(CONFIG_SPI_OC_TINY)		+= spi-oc-tiny.o
 obj-$(CONFIG_SPI_OMAP_UWIRE)		+= spi-omap-uwire.o
diff --git a/drivers/spi/spi-mxs.c b/drivers/spi/spi-mxs.c
new file mode 100644
index 0000000..81a2643
--- /dev/null
+++ b/drivers/spi/spi-mxs.c
@@ -0,0 +1,407 @@
+/*
+ * Freescale MXS SPI master driver
+ *
+ * Copyright 2012 DENX Software Engineering, GmbH.
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
+ *
+ * Rework and transition to new API by:
+ * Marek Vasut <marex@denx.de>
+ *
+ * Based on previous attempt by:
+ * Fabio Estevam <fabio.estevam@freescale.com>
+ *
+ * Based on code from U-Boot bootloader by:
+ * Marek Vasut <marex@denx.de>
+ *
+ * Based on spi-stmp.c, which is:
+ * Author: Dmitry Pervushin <dimka@embeddedalley.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/dma-mapping.h>
+#include <linux/dmaengine.h>
+#include <linux/highmem.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/completion.h>
+#include <linux/gpio.h>
+#include <linux/regulator/consumer.h>
+#include <linux/module.h>
+#include <linux/fsl/mxs-dma.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/stmp_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/mxs-spi.h>
+
+#define SSP_TIMEOUT		200	/* 200 ms */
+
+static int mxs_spi_setup_transfer(struct spi_device *spi,
+				struct spi_transfer *t)
+{
+	struct mxs_ssp *ssp = spi_master_get_devdata(spi->master);
+	uint8_t bits_per_word;
+	uint32_t hz = 0;
+
+	bits_per_word = spi->bits_per_word;
+	if (t && t->bits_per_word)
+		bits_per_word = t->bits_per_word;
+
+	if (bits_per_word != 8) {
+		dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
+					__func__, bits_per_word);
+		return -EINVAL;
+	}
+
+	if (spi->max_speed_hz)
+		hz = spi->max_speed_hz;
+	if (t && t->speed_hz)
+		hz = t->speed_hz;
+	if (hz == 0) {
+		dev_err(&spi->dev, "Cannot continue with zero clock\n");
+		return -EINVAL;
+	}
+
+	mxs_ssp_set_clk_rate(ssp, hz);
+
+	writel(BF_SSP_CTRL1_SSP_MODE(BV_SSP_CTRL1_SSP_MODE__SPI) |
+		     BF_SSP_CTRL1_WORD_LENGTH
+		     (BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS) |
+		     ((spi->mode & SPI_CPOL) ? BM_SSP_CTRL1_POLARITY : 0) |
+		     ((spi->mode & SPI_CPHA) ? BM_SSP_CTRL1_PHASE : 0),
+		     ssp->base + HW_SSP_CTRL1(ssp));
+
+	writel(0x0, ssp->base + HW_SSP_CMD0 + STMP_OFFSET_REG_SET);
+
+	return 0;
+}
+
+static void mxs_spi_cleanup(struct spi_device *spi)
+{
+	return;
+}
+
+/* the spi->mode bits understood by this driver: */
+static int mxs_spi_setup(struct spi_device *spi)
+{
+	int err = 0;
+
+	if (!spi->bits_per_word)
+		spi->bits_per_word = 8;
+
+	if (spi->mode & ~(SPI_CPOL | SPI_CPHA))
+		return -EINVAL;
+
+	err = mxs_spi_setup_transfer(spi, NULL);
+	if (err) {
+		dev_err(&spi->dev,
+			"Failed to setup transfer, error = %d\n", err);
+	}
+
+	return err;
+}
+
+static void mxs_spi_set_cs(struct mxs_ssp *ssp, unsigned cs)
+{
+	const uint32_t mask =
+		BM_SSP_CTRL0_WAIT_FOR_CMD | BM_SSP_CTRL0_WAIT_FOR_IRQ;
+	uint32_t select = 0;
+
+	writel(mask, ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
+
+	if (cs & 1)
+		select |= BM_SSP_CTRL0_WAIT_FOR_CMD;
+	if (cs & 2)
+		select |= BM_SSP_CTRL0_WAIT_FOR_IRQ;
+
+	writel(select, ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
+}
+
+static inline void mxs_spi_enable(struct mxs_ssp *ssp)
+{
+	writel(BM_SSP_CTRL0_LOCK_CS,
+		ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
+	writel(BM_SSP_CTRL0_IGNORE_CRC,
+		ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
+}
+
+static inline void mxs_spi_disable(struct mxs_ssp *ssp)
+{
+	writel(BM_SSP_CTRL0_LOCK_CS,
+		ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
+	writel(BM_SSP_CTRL0_IGNORE_CRC,
+		ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
+}
+
+static int mxs_ssp_wait_set(struct mxs_ssp *ssp, int offset, int mask)
+{
+	unsigned long timeout = jiffies + msecs_to_jiffies(SSP_TIMEOUT);
+
+	while (!(readl_relaxed(ssp->base + offset) & mask)) {
+		udelay(1);
+		if (time_after(jiffies, timeout))
+			return -ETIMEDOUT;
+	}
+	return 0;
+}
+
+static int mxs_ssp_wait_clr(struct mxs_ssp *ssp, int offset, int mask)
+{
+	unsigned long timeout = jiffies + msecs_to_jiffies(SSP_TIMEOUT);
+
+	while ((readl_relaxed(ssp->base + offset) & mask)) {
+		udelay(1);
+		if (time_after(jiffies, timeout))
+			return -ETIMEDOUT;
+	}
+	return 0;
+}
+
+static int mxs_spi_txrx_pio(struct mxs_ssp *ssp, int cs,
+			    unsigned char *buf, int len,
+			    int *first, int *last, int write)
+{
+	if (*first) {
+		mxs_spi_enable(ssp);
+		*first = 0;
+	}
+
+	mxs_spi_set_cs(ssp, cs);
+
+	while (len--) {
+		if (*last && len == 0) {
+			mxs_spi_disable(ssp);
+			*last = 0;
+		}
+
+		if (ssp->devid == IMX23_SSP) {
+			writel(BM_SSP_CTRL0_XFER_COUNT,
+				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
+			writel(1,
+				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
+		} else {
+			writel(1, ssp->base + HW_SSP_XFER_SIZE);
+		}
+
+		if (write)
+			writel(BM_SSP_CTRL0_READ,
+				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
+		else
+			writel(BM_SSP_CTRL0_READ,
+				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
+
+		writel(BM_SSP_CTRL0_RUN,
+				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
+
+		if (mxs_ssp_wait_set(ssp, HW_SSP_CTRL0, BM_SSP_CTRL0_RUN))
+			return -ETIMEDOUT;
+
+		if (write)
+			writel(*buf, ssp->base + HW_SSP_DATA);
+
+		writel(BM_SSP_CTRL0_DATA_XFER,
+			     ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
+
+		if (!write) {
+			if (mxs_ssp_wait_clr(ssp, HW_SSP_STATUS(ssp),
+						BM_SSP_STATUS_FIFO_EMPTY))
+				return -ETIMEDOUT;
+
+			*buf = (readl(ssp->base + HW_SSP_DATA) & 0xff);
+		}
+
+		if (mxs_ssp_wait_clr(ssp, HW_SSP_CTRL0, BM_SSP_CTRL0_RUN))
+			return -ETIMEDOUT;
+
+		buf++;
+	}
+
+	if (len <= 0)
+		return 0;
+
+	return -ETIMEDOUT;
+}
+
+static int mxs_spi_transfer_one(struct spi_master *spi, struct spi_message *m)
+{
+	struct mxs_ssp *ssp = spi_master_get_devdata(spi);
+	int first, last;
+	struct spi_transfer *t, *tmp_t;
+	int status = 0;
+	int cs;
+
+	first = last = 0;
+
+	cs = m->spi->chip_select;
+
+	list_for_each_entry_safe(t, tmp_t, &m->transfers, transfer_list) {
+
+		mxs_spi_setup_transfer(m->spi, t);
+
+		if (&t->transfer_list == m->transfers.next)
+			first = !0;
+		if (&t->transfer_list == m->transfers.prev)
+			last = !0;
+		if (t->rx_buf && t->tx_buf) {
+			pr_debug("%s: cannot send and receive simultaneously\n",
+				 __func__);
+			return -EINVAL;
+		}
+
+		if (t->tx_buf)
+			status = mxs_spi_txrx_pio(ssp, cs, (void *)t->tx_buf,
+					     t->len, &first, &last, 1);
+		if (t->rx_buf)
+			status = mxs_spi_txrx_pio(ssp, cs, t->rx_buf,
+					     t->len, &first, &last, 0);
+		m->actual_length += t->len;
+		if (status)
+			break;
+
+		first = last = 0;
+	}
+
+	m->status = 0;
+	spi_finalize_current_message(spi);
+
+	return status;
+}
+
+static const struct of_device_id mxs_spi_dt_ids[] = {
+	{ .compatible = "fsl,imx23-spi", .data = (void *) IMX23_SSP, },
+	{ .compatible = "fsl,imx28-spi", .data = (void *) IMX28_SSP, },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, mxs_spi_dt_ids);
+
+static int __devinit mxs_spi_probe(struct platform_device *pdev)
+{
+	const struct of_device_id *of_id =
+			of_match_device(mxs_spi_dt_ids, &pdev->dev);
+	struct device_node *np = pdev->dev.of_node;
+	struct spi_master *host;
+	struct mxs_ssp *ssp;
+	struct resource *iores;
+	struct pinctrl *pinctrl;
+	int ret = 0;
+
+	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!iores)
+		return -EINVAL;
+
+	host = spi_alloc_master(&pdev->dev, sizeof(struct mxs_ssp));
+	if (!host)
+		return -ENOMEM;
+
+	ssp = spi_master_get_devdata(host);
+	ssp->dev = &pdev->dev;
+	ssp->base = devm_request_and_ioremap(&pdev->dev, iores);
+	if (!ssp->base) {
+		ret = -EADDRNOTAVAIL;
+		goto out_spi_free;
+	}
+
+	if (np)
+		ssp->devid = (enum mxs_ssp_id) of_id->data;
+	else
+		ssp->devid = pdev->id_entry->driver_data;
+
+	host->transfer_one_message = mxs_spi_transfer_one;
+	host->setup = mxs_spi_setup;
+	host->cleanup = mxs_spi_cleanup;
+	host->mode_bits = SPI_CPOL | SPI_CPHA;
+	host->num_chipselect = 3;
+	host->dev.of_node = np;
+
+	pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
+	if (IS_ERR(pinctrl)) {
+		ret = PTR_ERR(pinctrl);
+		goto out_spi_free;
+	}
+
+	ssp->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(ssp->clk)) {
+		ret = PTR_ERR(ssp->clk);
+		goto out_spi_free;
+	}
+
+	clk_prepare_enable(ssp->clk);
+	ssp->clk_rate = clk_get_rate(ssp->clk) / 1000;
+
+	stmp_reset_block(ssp->base);
+
+	platform_set_drvdata(pdev, host);
+
+	ret = spi_register_master(host);
+	if (ret) {
+		dev_err(&pdev->dev, "Cannot register SPI master, %d\n", ret);
+		goto out_clk_put;
+	}
+
+	return 0;
+
+out_clk_put:
+	clk_disable_unprepare(ssp->clk);
+	clk_put(ssp->clk);
+out_spi_free:
+	spi_master_put(host);
+	return ret;
+}
+
+static int __devexit mxs_spi_remove(struct platform_device *pdev)
+{
+	struct spi_master *host;
+	struct mxs_ssp *ssp;
+
+	host = platform_get_drvdata(pdev);
+	if (host)
+		return 0;
+
+	ssp = spi_master_get_devdata(host);
+
+	spi_unregister_master(host);
+
+	platform_set_drvdata(pdev, NULL);
+
+	clk_disable_unprepare(ssp->clk);
+	clk_put(ssp->clk);
+
+	spi_master_put(host);
+
+	return 0;
+}
+
+static struct platform_driver mxs_spi_driver = {
+	.probe	= mxs_spi_probe,
+	.remove	= __devexit_p(mxs_spi_remove),
+	.driver	= {
+		.name	= "mxs-spi",
+		.owner	= THIS_MODULE,
+		.of_match_table = mxs_spi_dt_ids,
+	},
+};
+
+module_platform_driver(mxs_spi_driver);
+
+MODULE_AUTHOR("Dmitry Pervushin <dimka@embeddedalley.com>");
+MODULE_DESCRIPTION("MXS SPI master driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:mxs-spi");
-- 
1.7.10

Re: [PATCH 7/7] ARM: mxs: Add SPI driver for mx233/mx28

[Fabio Estevam]

Hi Marek,

On Sat, Jun 23, 2012 at 3:43 PM, Marek Vasut <marex@denx.de> wrote:

> +       ssp->clk = clk_get(&pdev->dev, NULL);
> +       if (IS_ERR(ssp->clk)) {
> +               ret = PTR_ERR(ssp->clk);
> +               goto out_spi_free;
> +       }

You could use devm_clk_get here instead,


> +
> +       clk_prepare_enable(ssp->clk);
> +       ssp->clk_rate = clk_get_rate(ssp->clk) / 1000;
> +
> +       stmp_reset_block(ssp->base);
> +
> +       platform_set_drvdata(pdev, host);
> +
> +       ret = spi_register_master(host);
> +       if (ret) {
> +               dev_err(&pdev->dev, "Cannot register SPI master, %d\n", ret);
> +               goto out_clk_put;
> +       }
> +
> +       return 0;
> +
> +out_clk_put:
> +       clk_disable_unprepare(ssp->clk);
> +       clk_put(ssp->clk);

,and then you would not need this clk_put here.

Driver looks good. Thanks for working on it.

Regards,

Fabio Estevam

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Re: [PATCH 7/7] ARM: mxs: Add SPI driver for mx233/mx28

[Marek Vasut]

Dear Fabio Estevam,

> Hi Marek,
> 
> On Sat, Jun 23, 2012 at 3:43 PM, Marek Vasut <marex-ynQEQJNshbs@public.gmane.org> wrote:
> > +       ssp->clk = clk_get(&pdev->dev, NULL);
> > +       if (IS_ERR(ssp->clk)) {
> > +               ret = PTR_ERR(ssp->clk);
> > +               goto out_spi_free;
> > +       }
> 
> You could use devm_clk_get here instead,
> 
> > +
> > +       clk_prepare_enable(ssp->clk);
> > +       ssp->clk_rate = clk_get_rate(ssp->clk) / 1000;
> > +
> > +       stmp_reset_block(ssp->base);
> > +
> > +       platform_set_drvdata(pdev, host);
> > +
> > +       ret = spi_register_master(host);
> > +       if (ret) {
> > +               dev_err(&pdev->dev, "Cannot register SPI master, %d\n",
> > ret); +               goto out_clk_put;
> > +       }
> > +
> > +       return 0;
> > +
> > +out_clk_put:
> > +       clk_disable_unprepare(ssp->clk);
> > +       clk_put(ssp->clk);
> 
> ,and then you would not need this clk_put here.

Oh, good point! I'll wait a little bit more until someone else reviews it and 
then I'll resubmit new version.

btw. I'm already working on a combined PIO/DMA-capable version -- seems like 
using PIO for small transfers and DMA for large transfers is good strategy that 
gives me about 200kbps boost ;-)

> Driver looks good. Thanks for working on it.
> 
> Regards,
> 
> Fabio Estevam

Best regards,
Marek Vasut

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Re: [PATCH 7/7] ARM: mxs: Add SPI driver for mx233/mx28

[Alain-Serge Nagni]

Marek Vasut <marex@...> writes:

> 
> Dear Fabio Estevam,
> 
> > Hi Marek,
> > 
> > On Sat, Jun 23, 2012 at 3:43 PM, Marek Vasut <marex@...> wrote:
> > > +       ssp->clk = clk_get(&pdev->dev, NULL);
> > > +       if (IS_ERR(ssp->clk)) {
> > > +               ret = PTR_ERR(ssp->clk);
> > > +               goto out_spi_free;
> > > +       }
> > 
> > You could use devm_clk_get here instead,
> > 
> > > +
> > > +       clk_prepare_enable(ssp->clk);
> > > +       ssp->clk_rate = clk_get_rate(ssp->clk) / 1000;
> > > +
> > > +       stmp_reset_block(ssp->base);
> > > +
> > > +       platform_set_drvdata(pdev, host);
> > > +
> > > +       ret = spi_register_master(host);
> > > +       if (ret) {
> > > +               dev_err(&pdev->dev, "Cannot register SPI master, %d\n",
> > > ret); +               goto out_clk_put;
> > > +       }
> > > +
> > > +       return 0;
> > > +
> > > +out_clk_put:
> > > +       clk_disable_unprepare(ssp->clk);
> > > +       clk_put(ssp->clk);
> > 
> > ,and then you would not need this clk_put here.
> 
> Oh, good point! I'll wait a little bit more until someone else reviews it and 
> then I'll resubmit new version.
> 
> btw. I'm already working on a combined PIO/DMA-capable version -- seems like 
> using PIO for small transfers and DMA for large transfers is good strategy
that 
> gives me about 200kbps boost 
> 
> > Driver looks good. Thanks for working on it.
> > 
> > Regards,
> > 
> > Fabio Estevam
> 
> Best regards,
> Marek Vasut
> 
> ------------------------------------------------------------------------------
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> Exclusive live event will cover all the ways today's security and 
> threat landscape has changed and how IT managers can respond. Discussions 
> will include endpoint security, mobile security and the latest in malware 
> threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/
> 



Hi Marek and Fabio,
 I have been testing your latest patch and have some problem to have it working.
The driver is crashing in the "mxs_spi_probe(struct platform_device *pdev)"
function (which is in the file spi-mxs.c) :
  It fails at this call:
          ssp->devid = pdev->id_entry->driver_data;

          after investigation, I can say that: pdev->id_entry  is null. So when
we access it, the kernel crashes.



I added these information in the mach-mx28evk.c file:

    a) in the static const iomux_cfg_t mx28evk_pads[] __initconst table:

       /* SPI2 */
       MX28_PAD_SSP2_SCK__SSP2_SCK,
       MX28_PAD_SSP2_MOSI__SSP2_CMD,
       MX28_PAD_SSP2_MISO__SSP2_D0,
       MX28_PAD_SSP2_SS0__SSP2_D3 |
        (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
       MX28_PAD_SSP2_SS1__SSP2_D4 |
        (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
       MX28_PAD_SSP2_SS2__SSP2_D5 |
        (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),


       /* SPI3 */
       MX28_PAD_SSP3_SCK__SSP3_SCK,
       MX28_PAD_SSP3_MOSI__SSP3_CMD,
       MX28_PAD_SSP3_MISO__SSP3_D0,
       MX28_PAD_SSP3_SS0__SSP3_D3 |
        (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),   



   b) I added an spi device definition:

      static struct spi_board_info mx28evk_spi_nor_device[] = {
      {
         .modalias    = "spidev",
         .chip_select    = 0,
         .max_speed_hz    = 5000000, // max spi clock (SCK) speed in HZ): 5MHz
         .bus_num    = 2,
         .mode = SPI_MODE_0,
      }, 
     };


    c) I added these calls in the "mx28evk_init(void)" function:

	mx28_add_mxs_spi(2);
	spi_register_board_info(mx28evk_spi_nor_device,
				ARRAY_SIZE(mx28evk_spi_nor_device));



What do you think may be the problem? If you need more details please let me
know.



Thanks for your help,
Alain-Serge



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Re: [PATCH 7/7] ARM: mxs: Add SPI driver for mx233/mx28

[Shawn Guo]

On Sat, Jun 23, 2012 at 08:43:53PM +0200, Marek Vasut wrote:
> This is slightly reworked version of the SPI driver.
> Support for DT has been added and it's been converted
> to queued API.
> 
> Based on previous attempt by:
> Fabio Estevam <fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> 
> Signed-off-by: Fabio Estevam <fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> Signed-off-by: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
> Cc: Chris Ball <cjb-2X9k7bc8m7Mdnm+yROfE0A@public.gmane.org>
> Cc: Detlev Zundel <dzu-ynQEQJNshbs@public.gmane.org>
> CC: Dong Aisheng <b29396-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> Cc: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
> Cc: Linux ARM kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
> Cc: Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
> CC: Shawn Guo <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Cc: Stefano Babic <sbabic-ynQEQJNshbs@public.gmane.org>
> Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
> ---
>  drivers/spi/Kconfig   |    6 +
>  drivers/spi/Makefile  |    1 +
>  drivers/spi/spi-mxs.c |  407 +++++++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 414 insertions(+)
>  create mode 100644 drivers/spi/spi-mxs.c
> 
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> index cd2fe35..85ca6a7 100644
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -355,6 +355,12 @@ config SPI_STMP3XXX
>  	help
>  	  SPI driver for Freescale STMP37xx/378x SoC SSP interface
>  
> +config SPI_MXS
> +	tristate "Freescale MXS SPI controller"
> +	depends on ARCH_MXS
> +	help
> +	  SPI driver for Freescale MXS devices.
> +
>  config SPI_TEGRA
>  	tristate "Nvidia Tegra SPI controller"
>  	depends on ARCH_TEGRA && TEGRA_SYSTEM_DMA
> diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> index 9d75d21..a684d1e 100644
> --- a/drivers/spi/Makefile
> +++ b/drivers/spi/Makefile
> @@ -35,6 +35,7 @@ obj-$(CONFIG_SPI_LM70_LLP)		+= spi-lm70llp.o
>  obj-$(CONFIG_SPI_MPC512x_PSC)		+= spi-mpc512x-psc.o
>  obj-$(CONFIG_SPI_MPC52xx_PSC)		+= spi-mpc52xx-psc.o
>  obj-$(CONFIG_SPI_MPC52xx)		+= spi-mpc52xx.o
> +obj-$(CONFIG_SPI_MXS)			+= spi-mxs.o
>  obj-$(CONFIG_SPI_NUC900)		+= spi-nuc900.o
>  obj-$(CONFIG_SPI_OC_TINY)		+= spi-oc-tiny.o
>  obj-$(CONFIG_SPI_OMAP_UWIRE)		+= spi-omap-uwire.o
> diff --git a/drivers/spi/spi-mxs.c b/drivers/spi/spi-mxs.c
> new file mode 100644
> index 0000000..81a2643
> --- /dev/null
> +++ b/drivers/spi/spi-mxs.c
> @@ -0,0 +1,407 @@
> +/*
> + * Freescale MXS SPI master driver
> + *
> + * Copyright 2012 DENX Software Engineering, GmbH.
> + * Copyright 2012 Freescale Semiconductor, Inc.
> + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
> + *
> + * Rework and transition to new API by:
> + * Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
> + *
> + * Based on previous attempt by:
> + * Fabio Estevam <fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> + *
> + * Based on code from U-Boot bootloader by:
> + * Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
> + *
> + * Based on spi-stmp.c, which is:
> + * Author: Dmitry Pervushin <dimka-L1vi/lXTdtvkgf6YlCu6wwC/G2K4zDHf@public.gmane.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/ioport.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/of_gpio.h>
> +#include <linux/platform_device.h>
> +#include <linux/delay.h>
> +#include <linux/interrupt.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/dmaengine.h>
> +#include <linux/highmem.h>
> +#include <linux/clk.h>
> +#include <linux/err.h>
> +#include <linux/completion.h>
> +#include <linux/gpio.h>
> +#include <linux/regulator/consumer.h>
> +#include <linux/module.h>
> +#include <linux/fsl/mxs-dma.h>
> +#include <linux/pinctrl/consumer.h>
> +#include <linux/stmp_device.h>
> +#include <linux/spi/spi.h>
> +#include <linux/spi/mxs-spi.h>

All these headers are needed? dma-mapping.h, dmaengine.h, highmem.h,
mxs-dma.h etc?  Or you will need them later?

> +
> +#define SSP_TIMEOUT		200	/* 200 ms */
> +
> +static int mxs_spi_setup_transfer(struct spi_device *spi,
> +				struct spi_transfer *t)
> +{
> +	struct mxs_ssp *ssp = spi_master_get_devdata(spi->master);
> +	uint8_t bits_per_word;
> +	uint32_t hz = 0;
> +
> +	bits_per_word = spi->bits_per_word;
> +	if (t && t->bits_per_word)
> +		bits_per_word = t->bits_per_word;
> +
> +	if (bits_per_word != 8) {
> +		dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
> +					__func__, bits_per_word);
> +		return -EINVAL;
> +	}
> +
> +	if (spi->max_speed_hz)
> +		hz = spi->max_speed_hz;
> +	if (t && t->speed_hz)
> +		hz = t->speed_hz;
> +	if (hz == 0) {
> +		dev_err(&spi->dev, "Cannot continue with zero clock\n");
> +		return -EINVAL;
> +	}
> +
> +	mxs_ssp_set_clk_rate(ssp, hz);
> +
> +	writel(BF_SSP_CTRL1_SSP_MODE(BV_SSP_CTRL1_SSP_MODE__SPI) |
> +		     BF_SSP_CTRL1_WORD_LENGTH
> +		     (BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS) |
> +		     ((spi->mode & SPI_CPOL) ? BM_SSP_CTRL1_POLARITY : 0) |
> +		     ((spi->mode & SPI_CPHA) ? BM_SSP_CTRL1_PHASE : 0),
> +		     ssp->base + HW_SSP_CTRL1(ssp));
> +
> +	writel(0x0, ssp->base + HW_SSP_CMD0 + STMP_OFFSET_REG_SET);
> +
> +	return 0;
> +}
> +
> +static void mxs_spi_cleanup(struct spi_device *spi)
> +{
> +	return;
> +}
> +
> +/* the spi->mode bits understood by this driver: */

Incomplete comment?  Remove it or make it complete?

> +static int mxs_spi_setup(struct spi_device *spi)
> +{
> +	int err = 0;
> +
> +	if (!spi->bits_per_word)
> +		spi->bits_per_word = 8;
> +
> +	if (spi->mode & ~(SPI_CPOL | SPI_CPHA))
> +		return -EINVAL;
> +
> +	err = mxs_spi_setup_transfer(spi, NULL);
> +	if (err) {
> +		dev_err(&spi->dev,
> +			"Failed to setup transfer, error = %d\n", err);
> +	}

Unnecessary braces.

> +
> +	return err;
> +}
> +
> +static void mxs_spi_set_cs(struct mxs_ssp *ssp, unsigned cs)
> +{
> +	const uint32_t mask =
> +		BM_SSP_CTRL0_WAIT_FOR_CMD | BM_SSP_CTRL0_WAIT_FOR_IRQ;
> +	uint32_t select = 0;
> +
> +	writel(mask, ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
> +
> +	if (cs & 1)
> +		select |= BM_SSP_CTRL0_WAIT_FOR_CMD;
> +	if (cs & 2)
> +		select |= BM_SSP_CTRL0_WAIT_FOR_IRQ;
> +
> +	writel(select, ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> +}
> +
> +static inline void mxs_spi_enable(struct mxs_ssp *ssp)
> +{
> +	writel(BM_SSP_CTRL0_LOCK_CS,
> +		ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> +	writel(BM_SSP_CTRL0_IGNORE_CRC,
> +		ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
> +}
> +
> +static inline void mxs_spi_disable(struct mxs_ssp *ssp)
> +{
> +	writel(BM_SSP_CTRL0_LOCK_CS,
> +		ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
> +	writel(BM_SSP_CTRL0_IGNORE_CRC,
> +		ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> +}
> +
> +static int mxs_ssp_wait_set(struct mxs_ssp *ssp, int offset, int mask)
> +{
> +	unsigned long timeout = jiffies + msecs_to_jiffies(SSP_TIMEOUT);
> +
> +	while (!(readl_relaxed(ssp->base + offset) & mask)) {
> +		udelay(1);
> +		if (time_after(jiffies, timeout))
> +			return -ETIMEDOUT;
> +	}
> +	return 0;
> +}
> +
> +static int mxs_ssp_wait_clr(struct mxs_ssp *ssp, int offset, int mask)
> +{
> +	unsigned long timeout = jiffies + msecs_to_jiffies(SSP_TIMEOUT);
> +
> +	while ((readl_relaxed(ssp->base + offset) & mask)) {
> +		udelay(1);
> +		if (time_after(jiffies, timeout))
> +			return -ETIMEDOUT;
> +	}
> +	return 0;
> +}
> +
Merge these two functions into mxs_ssp_wait with one more argument?

> +static int mxs_spi_txrx_pio(struct mxs_ssp *ssp, int cs,
> +			    unsigned char *buf, int len,
> +			    int *first, int *last, int write)
> +{
> +	if (*first) {
> +		mxs_spi_enable(ssp);
> +		*first = 0;
> +	}
> +
> +	mxs_spi_set_cs(ssp, cs);
> +
> +	while (len--) {
> +		if (*last && len == 0) {
> +			mxs_spi_disable(ssp);
> +			*last = 0;
> +		}
> +
> +		if (ssp->devid == IMX23_SSP) {
> +			writel(BM_SSP_CTRL0_XFER_COUNT,
> +				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
> +			writel(1,
> +				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> +		} else {
> +			writel(1, ssp->base + HW_SSP_XFER_SIZE);
> +		}
> +
> +		if (write)
> +			writel(BM_SSP_CTRL0_READ,
> +				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
> +		else
> +			writel(BM_SSP_CTRL0_READ,
> +				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> +
> +		writel(BM_SSP_CTRL0_RUN,
> +				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> +
> +		if (mxs_ssp_wait_set(ssp, HW_SSP_CTRL0, BM_SSP_CTRL0_RUN))
> +			return -ETIMEDOUT;
> +
> +		if (write)
> +			writel(*buf, ssp->base + HW_SSP_DATA);
> +
> +		writel(BM_SSP_CTRL0_DATA_XFER,
> +			     ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> +
> +		if (!write) {
> +			if (mxs_ssp_wait_clr(ssp, HW_SSP_STATUS(ssp),
> +						BM_SSP_STATUS_FIFO_EMPTY))
> +				return -ETIMEDOUT;
> +
> +			*buf = (readl(ssp->base + HW_SSP_DATA) & 0xff);
> +		}
> +
> +		if (mxs_ssp_wait_clr(ssp, HW_SSP_CTRL0, BM_SSP_CTRL0_RUN))
> +			return -ETIMEDOUT;
> +
> +		buf++;
> +	}
> +
> +	if (len <= 0)
> +		return 0;
> +
> +	return -ETIMEDOUT;
> +}
> +
> +static int mxs_spi_transfer_one(struct spi_master *spi, struct spi_message *m)
> +{
> +	struct mxs_ssp *ssp = spi_master_get_devdata(spi);
> +	int first, last;
> +	struct spi_transfer *t, *tmp_t;
> +	int status = 0;
> +	int cs;
> +
> +	first = last = 0;
> +
> +	cs = m->spi->chip_select;
> +
> +	list_for_each_entry_safe(t, tmp_t, &m->transfers, transfer_list) {
> +
> +		mxs_spi_setup_transfer(m->spi, t);
> +
> +		if (&t->transfer_list == m->transfers.next)
> +			first = !0;

Why not simply "first = 1;"?

> +		if (&t->transfer_list == m->transfers.prev)
> +			last = !0;

Ditto

> +		if (t->rx_buf && t->tx_buf) {
> +			pr_debug("%s: cannot send and receive simultaneously\n",
> +				 __func__);

dev_dbg?  Then __func__ is not important to be there.

> +			return -EINVAL;
> +		}
> +
> +		if (t->tx_buf)
> +			status = mxs_spi_txrx_pio(ssp, cs, (void *)t->tx_buf,

Is the cast really needed?  The t->rx_buf below seems not having it.

> +					     t->len, &first, &last, 1);
> +		if (t->rx_buf)
> +			status = mxs_spi_txrx_pio(ssp, cs, t->rx_buf,
> +					     t->len, &first, &last, 0);
> +		m->actual_length += t->len;
> +		if (status)
> +			break;
> +
> +		first = last = 0;
> +	}
> +
> +	m->status = 0;
> +	spi_finalize_current_message(spi);
> +
> +	return status;
> +}
> +
> +static const struct of_device_id mxs_spi_dt_ids[] = {
> +	{ .compatible = "fsl,imx23-spi", .data = (void *) IMX23_SSP, },
> +	{ .compatible = "fsl,imx28-spi", .data = (void *) IMX28_SSP, },
> +	{ /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, mxs_spi_dt_ids);
> +
> +static int __devinit mxs_spi_probe(struct platform_device *pdev)
> +{
> +	const struct of_device_id *of_id =
> +			of_match_device(mxs_spi_dt_ids, &pdev->dev);
> +	struct device_node *np = pdev->dev.of_node;
> +	struct spi_master *host;
> +	struct mxs_ssp *ssp;
> +	struct resource *iores;
> +	struct pinctrl *pinctrl;
> +	int ret = 0;
> +
> +	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	if (!iores)
> +		return -EINVAL;

Moving the call right before devm_request_and_ioremap seems reasonable?
Also the error check could be saved, since devm_request_and_ioremap
will take care of it.

> +
> +	host = spi_alloc_master(&pdev->dev, sizeof(struct mxs_ssp));

sizeof(*ssp)

> +	if (!host)
> +		return -ENOMEM;
> +
> +	ssp = spi_master_get_devdata(host);
> +	ssp->dev = &pdev->dev;
> +	ssp->base = devm_request_and_ioremap(&pdev->dev, iores);
> +	if (!ssp->base) {
> +		ret = -EADDRNOTAVAIL;
> +		goto out_spi_free;
> +	}
> +
> +	if (np)
> +		ssp->devid = (enum mxs_ssp_id) of_id->data;
> +	else
> +		ssp->devid = pdev->id_entry->driver_data;
> +
> +	host->transfer_one_message = mxs_spi_transfer_one;
> +	host->setup = mxs_spi_setup;
> +	host->cleanup = mxs_spi_cleanup;
> +	host->mode_bits = SPI_CPOL | SPI_CPHA;
> +	host->num_chipselect = 3;
> +	host->dev.of_node = np;
> +
> +	pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
> +	if (IS_ERR(pinctrl)) {
> +		ret = PTR_ERR(pinctrl);
> +		goto out_spi_free;
> +	}
> +
> +	ssp->clk = clk_get(&pdev->dev, NULL);
> +	if (IS_ERR(ssp->clk)) {
> +		ret = PTR_ERR(ssp->clk);
> +		goto out_spi_free;
> +	}
> +
> +	clk_prepare_enable(ssp->clk);
> +	ssp->clk_rate = clk_get_rate(ssp->clk) / 1000;
> +
> +	stmp_reset_block(ssp->base);
> +
> +	platform_set_drvdata(pdev, host);
> +
> +	ret = spi_register_master(host);
> +	if (ret) {
> +		dev_err(&pdev->dev, "Cannot register SPI master, %d\n", ret);
> +		goto out_clk_put;
> +	}
> +
> +	return 0;
> +
> +out_clk_put:
> +	clk_disable_unprepare(ssp->clk);
> +	clk_put(ssp->clk);
> +out_spi_free:
> +	spi_master_put(host);

spi_master_put will not free the memory, so we have to call kfree to
do it.

> +	return ret;
> +}
> +
> +static int __devexit mxs_spi_remove(struct platform_device *pdev)
> +{
> +	struct spi_master *host;
> +	struct mxs_ssp *ssp;
> +
> +	host = platform_get_drvdata(pdev);
> +	if (host)
> +		return 0;

Hmm, why the check and return here?

> +
> +	ssp = spi_master_get_devdata(host);
> +
> +	spi_unregister_master(host);
> +
> +	platform_set_drvdata(pdev, NULL);
> +
> +	clk_disable_unprepare(ssp->clk);
> +	clk_put(ssp->clk);
> +
> +	spi_master_put(host);

kfree

> +
> +	return 0;
> +}
> +
> +static struct platform_driver mxs_spi_driver = {
> +	.probe	= mxs_spi_probe,
> +	.remove	= __devexit_p(mxs_spi_remove),
> +	.driver	= {
> +		.name	= "mxs-spi",
> +		.owner	= THIS_MODULE,
> +		.of_match_table = mxs_spi_dt_ids,
> +	},
> +};
> +
> +module_platform_driver(mxs_spi_driver);
> +
> +MODULE_AUTHOR("Dmitry Pervushin <dimka-L1vi/lXTdtvkgf6YlCu6wwC/G2K4zDHf@public.gmane.org>");
> +MODULE_DESCRIPTION("MXS SPI master driver");
> +MODULE_LICENSE("GPL");
> +MODULE_ALIAS("platform:mxs-spi");
> -- 
> 1.7.10
> 

-- 
Regards,
Shawn


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Re: [PATCH 7/7] ARM: mxs: Add SPI driver for mx233/mx28

[Marek Vasut]

Dear Shawn Guo,

> On Sat, Jun 23, 2012 at 08:43:53PM +0200, Marek Vasut wrote:
> > This is slightly reworked version of the SPI driver.
> > Support for DT has been added and it's been converted
> > to queued API.
> > 
> > Based on previous attempt by:
> > Fabio Estevam <fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> > 
> > Signed-off-by: Fabio Estevam <fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> > Signed-off-by: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
> > Cc: Chris Ball <cjb-2X9k7bc8m7Mdnm+yROfE0A@public.gmane.org>
> > Cc: Detlev Zundel <dzu-ynQEQJNshbs@public.gmane.org>
> > CC: Dong Aisheng <b29396-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> > Cc: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
> > Cc: Linux ARM kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
> > Cc: Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
> > CC: Shawn Guo <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> > Cc: Stefano Babic <sbabic-ynQEQJNshbs@public.gmane.org>
> > Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
> > ---
> > 
> >  drivers/spi/Kconfig   |    6 +
> >  drivers/spi/Makefile  |    1 +
> >  drivers/spi/spi-mxs.c |  407
> >  +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 414
> >  insertions(+)
> >  create mode 100644 drivers/spi/spi-mxs.c
> > 
> > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> > index cd2fe35..85ca6a7 100644
> > --- a/drivers/spi/Kconfig
> > +++ b/drivers/spi/Kconfig
> > @@ -355,6 +355,12 @@ config SPI_STMP3XXX
> > 
> >  	help
> >  	
> >  	  SPI driver for Freescale STMP37xx/378x SoC SSP interface
> > 
> > +config SPI_MXS
> > +	tristate "Freescale MXS SPI controller"
> > +	depends on ARCH_MXS
> > +	help
> > +	  SPI driver for Freescale MXS devices.
> > +
> > 
> >  config SPI_TEGRA
> >  
> >  	tristate "Nvidia Tegra SPI controller"
> >  	depends on ARCH_TEGRA && TEGRA_SYSTEM_DMA
> > 
> > diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> > index 9d75d21..a684d1e 100644
> > --- a/drivers/spi/Makefile
> > +++ b/drivers/spi/Makefile
> > @@ -35,6 +35,7 @@ obj-$(CONFIG_SPI_LM70_LLP)		+= spi-lm70llp.o
> > 
> >  obj-$(CONFIG_SPI_MPC512x_PSC)		+= spi-mpc512x-psc.o
> >  obj-$(CONFIG_SPI_MPC52xx_PSC)		+= spi-mpc52xx-psc.o
> >  obj-$(CONFIG_SPI_MPC52xx)		+= spi-mpc52xx.o
> > 
> > +obj-$(CONFIG_SPI_MXS)			+= spi-mxs.o
> > 
> >  obj-$(CONFIG_SPI_NUC900)		+= spi-nuc900.o
> >  obj-$(CONFIG_SPI_OC_TINY)		+= spi-oc-tiny.o
> >  obj-$(CONFIG_SPI_OMAP_UWIRE)		+= spi-omap-uwire.o
> > 
> > diff --git a/drivers/spi/spi-mxs.c b/drivers/spi/spi-mxs.c
> > new file mode 100644
> > index 0000000..81a2643
> > --- /dev/null
> > +++ b/drivers/spi/spi-mxs.c
> > @@ -0,0 +1,407 @@
> > +/*
> > + * Freescale MXS SPI master driver
> > + *
> > + * Copyright 2012 DENX Software Engineering, GmbH.
> > + * Copyright 2012 Freescale Semiconductor, Inc.
> > + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
> > + *
> > + * Rework and transition to new API by:
> > + * Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
> > + *
> > + * Based on previous attempt by:
> > + * Fabio Estevam <fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> > + *
> > + * Based on code from U-Boot bootloader by:
> > + * Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
> > + *
> > + * Based on spi-stmp.c, which is:
> > + * Author: Dmitry Pervushin <dimka-L1vi/lXTdtvkgf6YlCu6wwC/G2K4zDHf@public.gmane.org>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#include <linux/kernel.h>
> > +#include <linux/init.h>
> > +#include <linux/ioport.h>
> > +#include <linux/of.h>
> > +#include <linux/of_device.h>
> > +#include <linux/of_gpio.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/delay.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/dma-mapping.h>
> > +#include <linux/dmaengine.h>
> > +#include <linux/highmem.h>
> > +#include <linux/clk.h>
> > +#include <linux/err.h>
> > +#include <linux/completion.h>
> > +#include <linux/gpio.h>
> > +#include <linux/regulator/consumer.h>
> > +#include <linux/module.h>
> > +#include <linux/fsl/mxs-dma.h>
> > +#include <linux/pinctrl/consumer.h>
> > +#include <linux/stmp_device.h>
> > +#include <linux/spi/spi.h>
> > +#include <linux/spi/mxs-spi.h>
> 
> All these headers are needed? dma-mapping.h, dmaengine.h, highmem.h,
> mxs-dma.h etc?  Or you will need them later?

Not later, I already do need them. It's just that I didn't submit the last patch 
yet, since I developed it only after these were submitted.

> > +
> > +#define SSP_TIMEOUT		200	/* 200 ms */
> > +
> > +static int mxs_spi_setup_transfer(struct spi_device *spi,
> > +				struct spi_transfer *t)
> > +{
> > +	struct mxs_ssp *ssp = spi_master_get_devdata(spi->master);
> > +	uint8_t bits_per_word;
> > +	uint32_t hz = 0;
> > +
> > +	bits_per_word = spi->bits_per_word;
> > +	if (t && t->bits_per_word)
> > +		bits_per_word = t->bits_per_word;
> > +
> > +	if (bits_per_word != 8) {
> > +		dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
> > +					__func__, bits_per_word);
> > +		return -EINVAL;
> > +	}
> > +
> > +	if (spi->max_speed_hz)
> > +		hz = spi->max_speed_hz;
> > +	if (t && t->speed_hz)
> > +		hz = t->speed_hz;
> > +	if (hz == 0) {
> > +		dev_err(&spi->dev, "Cannot continue with zero clock\n");
> > +		return -EINVAL;
> > +	}
> > +
> > +	mxs_ssp_set_clk_rate(ssp, hz);
> > +
> > +	writel(BF_SSP_CTRL1_SSP_MODE(BV_SSP_CTRL1_SSP_MODE__SPI) |
> > +		     BF_SSP_CTRL1_WORD_LENGTH
> > +		     (BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS) |
> > +		     ((spi->mode & SPI_CPOL) ? BM_SSP_CTRL1_POLARITY : 0) |
> > +		     ((spi->mode & SPI_CPHA) ? BM_SSP_CTRL1_PHASE : 0),
> > +		     ssp->base + HW_SSP_CTRL1(ssp));
> > +
> > +	writel(0x0, ssp->base + HW_SSP_CMD0 + STMP_OFFSET_REG_SET);
> > +
> > +	return 0;
> > +}
> > +
> > +static void mxs_spi_cleanup(struct spi_device *spi)
> > +{
> > +	return;
> > +}
> > +
> > +/* the spi->mode bits understood by this driver: */
> 
> Incomplete comment?  Remove it or make it complete?

Good catch.

> > +static int mxs_spi_setup(struct spi_device *spi)
> > +{
> > +	int err = 0;
> > +
> > +	if (!spi->bits_per_word)
> > +		spi->bits_per_word = 8;
> > +
> > +	if (spi->mode & ~(SPI_CPOL | SPI_CPHA))
> > +		return -EINVAL;
> > +
> > +	err = mxs_spi_setup_transfer(spi, NULL);
> > +	if (err) {
> > +		dev_err(&spi->dev,
> > +			"Failed to setup transfer, error = %d\n", err);
> > +	}
> 
> Unnecessary braces.

It's much more readable for multiline code.

> > +
> > +	return err;
> > +}
> > +
> > +static void mxs_spi_set_cs(struct mxs_ssp *ssp, unsigned cs)
> > +{
> > +	const uint32_t mask =
> > +		BM_SSP_CTRL0_WAIT_FOR_CMD | BM_SSP_CTRL0_WAIT_FOR_IRQ;
> > +	uint32_t select = 0;
> > +
> > +	writel(mask, ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
> > +
> > +	if (cs & 1)
> > +		select |= BM_SSP_CTRL0_WAIT_FOR_CMD;
> > +	if (cs & 2)
> > +		select |= BM_SSP_CTRL0_WAIT_FOR_IRQ;
> > +
> > +	writel(select, ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> > +}
> > +
> > +static inline void mxs_spi_enable(struct mxs_ssp *ssp)
> > +{
> > +	writel(BM_SSP_CTRL0_LOCK_CS,
> > +		ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> > +	writel(BM_SSP_CTRL0_IGNORE_CRC,
> > +		ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
> > +}
> > +
> > +static inline void mxs_spi_disable(struct mxs_ssp *ssp)
> > +{
> > +	writel(BM_SSP_CTRL0_LOCK_CS,
> > +		ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
> > +	writel(BM_SSP_CTRL0_IGNORE_CRC,
> > +		ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> > +}
> > +
> > +static int mxs_ssp_wait_set(struct mxs_ssp *ssp, int offset, int mask)
> > +{
> > +	unsigned long timeout = jiffies + msecs_to_jiffies(SSP_TIMEOUT);
> > +
> > +	while (!(readl_relaxed(ssp->base + offset) & mask)) {
> > +		udelay(1);
> > +		if (time_after(jiffies, timeout))
> > +			return -ETIMEDOUT;
> > +	}
> > +	return 0;
> > +}
> > +
> > +static int mxs_ssp_wait_clr(struct mxs_ssp *ssp, int offset, int mask)
> > +{
> > +	unsigned long timeout = jiffies + msecs_to_jiffies(SSP_TIMEOUT);
> > +
> > +	while ((readl_relaxed(ssp->base + offset) & mask)) {
> > +		udelay(1);
> > +		if (time_after(jiffies, timeout))
> > +			return -ETIMEDOUT;
> > +	}
> > +	return 0;
> > +}
> > +
> 
> Merge these two functions into mxs_ssp_wait with one more argument?
> 
> > +static int mxs_spi_txrx_pio(struct mxs_ssp *ssp, int cs,
> > +			    unsigned char *buf, int len,
> > +			    int *first, int *last, int write)
> > +{
> > +	if (*first) {
> > +		mxs_spi_enable(ssp);
> > +		*first = 0;
> > +	}
> > +
> > +	mxs_spi_set_cs(ssp, cs);
> > +
> > +	while (len--) {
> > +		if (*last && len == 0) {
> > +			mxs_spi_disable(ssp);
> > +			*last = 0;
> > +		}
> > +
> > +		if (ssp->devid == IMX23_SSP) {
> > +			writel(BM_SSP_CTRL0_XFER_COUNT,
> > +				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
> > +			writel(1,
> > +				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> > +		} else {
> > +			writel(1, ssp->base + HW_SSP_XFER_SIZE);
> > +		}
> > +
> > +		if (write)
> > +			writel(BM_SSP_CTRL0_READ,
> > +				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
> > +		else
> > +			writel(BM_SSP_CTRL0_READ,
> > +				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> > +
> > +		writel(BM_SSP_CTRL0_RUN,
> > +				ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> > +
> > +		if (mxs_ssp_wait_set(ssp, HW_SSP_CTRL0, BM_SSP_CTRL0_RUN))
> > +			return -ETIMEDOUT;
> > +
> > +		if (write)
> > +			writel(*buf, ssp->base + HW_SSP_DATA);
> > +
> > +		writel(BM_SSP_CTRL0_DATA_XFER,
> > +			     ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
> > +
> > +		if (!write) {
> > +			if (mxs_ssp_wait_clr(ssp, HW_SSP_STATUS(ssp),
> > +						BM_SSP_STATUS_FIFO_EMPTY))
> > +				return -ETIMEDOUT;
> > +
> > +			*buf = (readl(ssp->base + HW_SSP_DATA) & 0xff);
> > +		}
> > +
> > +		if (mxs_ssp_wait_clr(ssp, HW_SSP_CTRL0, BM_SSP_CTRL0_RUN))
> > +			return -ETIMEDOUT;
> > +
> > +		buf++;
> > +	}
> > +
> > +	if (len <= 0)
> > +		return 0;
> > +
> > +	return -ETIMEDOUT;
> > +}
> > +
> > +static int mxs_spi_transfer_one(struct spi_master *spi, struct
> > spi_message *m) +{
> > +	struct mxs_ssp *ssp = spi_master_get_devdata(spi);
> > +	int first, last;
> > +	struct spi_transfer *t, *tmp_t;
> > +	int status = 0;
> > +	int cs;
> > +
> > +	first = last = 0;
> > +
> > +	cs = m->spi->chip_select;
> > +
> > +	list_for_each_entry_safe(t, tmp_t, &m->transfers, transfer_list) {
> > +
> > +		mxs_spi_setup_transfer(m->spi, t);
> > +
> > +		if (&t->transfer_list == m->transfers.next)
> > +			first = !0;
> 
> Why not simply "first = 1;"?
> 
> > +		if (&t->transfer_list == m->transfers.prev)
> > +			last = !0;
> 
> Ditto
> 
> > +		if (t->rx_buf && t->tx_buf) {
> > +			pr_debug("%s: cannot send and receive simultaneously\n",
> > +				 __func__);
> 
> dev_dbg?  Then __func__ is not important to be there.

Correct.

> > +			return -EINVAL;
> > +		}
> > +
> > +		if (t->tx_buf)
> > +			status = mxs_spi_txrx_pio(ssp, cs, (void *)t->tx_buf,
> 
> Is the cast really needed?  The t->rx_buf below seems not having it.

Yes, it is. Since t->tx_buf is const void *, we need to cast it so the compiler 
won't complain.

> > +					     t->len, &first, &last, 1);
> > +		if (t->rx_buf)
> > +			status = mxs_spi_txrx_pio(ssp, cs, t->rx_buf,
> > +					     t->len, &first, &last, 0);
> > +		m->actual_length += t->len;
> > +		if (status)
> > +			break;
> > +
> > +		first = last = 0;
> > +	}
> > +
> > +	m->status = 0;
> > +	spi_finalize_current_message(spi);
> > +
> > +	return status;
> > +}
> > +
> > +static const struct of_device_id mxs_spi_dt_ids[] = {
> > +	{ .compatible = "fsl,imx23-spi", .data = (void *) IMX23_SSP, },
> > +	{ .compatible = "fsl,imx28-spi", .data = (void *) IMX28_SSP, },
> > +	{ /* sentinel */ }
> > +};
> > +MODULE_DEVICE_TABLE(of, mxs_spi_dt_ids);
> > +
> > +static int __devinit mxs_spi_probe(struct platform_device *pdev)
> > +{
> > +	const struct of_device_id *of_id =
> > +			of_match_device(mxs_spi_dt_ids, &pdev->dev);
> > +	struct device_node *np = pdev->dev.of_node;
> > +	struct spi_master *host;
> > +	struct mxs_ssp *ssp;
> > +	struct resource *iores;
> > +	struct pinctrl *pinctrl;
> > +	int ret = 0;
> > +
> > +	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +	if (!iores)
> > +		return -EINVAL;
> 
> Moving the call right before devm_request_and_ioremap seems reasonable?
> Also the error check could be saved, since devm_request_and_ioremap
> will take care of it.

Actually I tried to follow the code path of mxs_mmc here as much as possible, 
hoping we might eventually be able to converge them and make some code shared.

> > +
> > +	host = spi_alloc_master(&pdev->dev, sizeof(struct mxs_ssp));
> 
> sizeof(*ssp)
> 
> > +	if (!host)
> > +		return -ENOMEM;
> > +
> > +	ssp = spi_master_get_devdata(host);
> > +	ssp->dev = &pdev->dev;
> > +	ssp->base = devm_request_and_ioremap(&pdev->dev, iores);
> > +	if (!ssp->base) {
> > +		ret = -EADDRNOTAVAIL;
> > +		goto out_spi_free;
> > +	}
> > +
> > +	if (np)
> > +		ssp->devid = (enum mxs_ssp_id) of_id->data;
> > +	else
> > +		ssp->devid = pdev->id_entry->driver_data;
> > +
> > +	host->transfer_one_message = mxs_spi_transfer_one;
> > +	host->setup = mxs_spi_setup;
> > +	host->cleanup = mxs_spi_cleanup;
> > +	host->mode_bits = SPI_CPOL | SPI_CPHA;
> > +	host->num_chipselect = 3;
> > +	host->dev.of_node = np;
> > +
> > +	pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
> > +	if (IS_ERR(pinctrl)) {
> > +		ret = PTR_ERR(pinctrl);
> > +		goto out_spi_free;
> > +	}
> > +
> > +	ssp->clk = clk_get(&pdev->dev, NULL);
> > +	if (IS_ERR(ssp->clk)) {
> > +		ret = PTR_ERR(ssp->clk);
> > +		goto out_spi_free;
> > +	}
> > +
> > +	clk_prepare_enable(ssp->clk);
> > +	ssp->clk_rate = clk_get_rate(ssp->clk) / 1000;
> > +
> > +	stmp_reset_block(ssp->base);
> > +
> > +	platform_set_drvdata(pdev, host);
> > +
> > +	ret = spi_register_master(host);
> > +	if (ret) {
> > +		dev_err(&pdev->dev, "Cannot register SPI master, %d\n", ret);
> > +		goto out_clk_put;
> > +	}
> > +
> > +	return 0;
> > +
> > +out_clk_put:
> > +	clk_disable_unprepare(ssp->clk);
> > +	clk_put(ssp->clk);
> > +out_spi_free:
> > +	spi_master_put(host);
> 
> spi_master_put will not free the memory, so we have to call kfree to
> do it.
> 
> > +	return ret;
> > +}
> > +
> > +static int __devexit mxs_spi_remove(struct platform_device *pdev)
> > +{
> > +	struct spi_master *host;
> > +	struct mxs_ssp *ssp;
> > +
> > +	host = platform_get_drvdata(pdev);
> > +	if (host)
> > +		return 0;
> 
> Hmm, why the check and return here?

If it's not set, things went _very_ wrong somewhere. Maybe BUG_ON() might be 
better?

> > +
> > +	ssp = spi_master_get_devdata(host);
> > +
> > +	spi_unregister_master(host);
> > +
> > +	platform_set_drvdata(pdev, NULL);
> > +
> > +	clk_disable_unprepare(ssp->clk);
> > +	clk_put(ssp->clk);
> > +
> > +	spi_master_put(host);
> 
> kfree
> 
> > +
> > +	return 0;
> > +}
> > +
> > +static struct platform_driver mxs_spi_driver = {
> > +	.probe	= mxs_spi_probe,
> > +	.remove	= __devexit_p(mxs_spi_remove),
> > +	.driver	= {
> > +		.name	= "mxs-spi",
> > +		.owner	= THIS_MODULE,
> > +		.of_match_table = mxs_spi_dt_ids,
> > +	},
> > +};
> > +
> > +module_platform_driver(mxs_spi_driver);
> > +
> > +MODULE_AUTHOR("Dmitry Pervushin <dimka-L1vi/lXTdtvkgf6YlCu6wwC/G2K4zDHf@public.gmane.org>");
> > +MODULE_DESCRIPTION("MXS SPI master driver");
> > +MODULE_LICENSE("GPL");
> > +MODULE_ALIAS("platform:mxs-spi");

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Re: [PATCH 7/7] ARM: mxs: Add SPI driver for mx233/mx28

[Shawn Guo]

On Tue, Jun 26, 2012 at 02:22:54PM +0200, Marek Vasut wrote:
> > > +static int __devexit mxs_spi_remove(struct platform_device *pdev)
> > > +{
> > > +	struct spi_master *host;
> > > +	struct mxs_ssp *ssp;
> > > +
> > > +	host = platform_get_drvdata(pdev);
> > > +	if (host)
> > > +		return 0;
> > 
> > Hmm, why the check and return here?
> 
> If it's not set, things went _very_ wrong somewhere. Maybe BUG_ON() might be 
> better?
> 
So shouldn't it be "if (!host)"?

And I still do not understand how that could happen.  I think
mxs_spi_remove will only be called in case that mxs_spi_probe
succeeds, which means platform_set_drvdata must have been called
already?

-- 
Regards,
Shawn

Re: [PATCH 7/7] ARM: mxs: Add SPI driver for mx233/mx28

[Marek Vasut]

Dear Shawn Guo,

> On Tue, Jun 26, 2012 at 02:22:54PM +0200, Marek Vasut wrote:
> > > > +static int __devexit mxs_spi_remove(struct platform_device *pdev)
> > > > +{
> > > > +	struct spi_master *host;
> > > > +	struct mxs_ssp *ssp;
> > > > +
> > > > +	host = platform_get_drvdata(pdev);
> > > > +	if (host)
> > > > +		return 0;
> > > 
> > > Hmm, why the check and return here?
> > 
> > If it's not set, things went _very_ wrong somewhere. Maybe BUG_ON() might
> > be better?
> 
> So shouldn't it be "if (!host)"?
> 
> And I still do not understand how that could happen.  I think
> mxs_spi_remove will only be called in case that mxs_spi_probe
> succeeds, which means platform_set_drvdata must have been called
> already?

Ok, we can remove that altogether then.

Best regards,
Marek Vasut

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Re: [PATCH 1/7] ARM: mxs: Move SSP register definitions into separate file

[Shawn Guo]

We should not use prefix "ARM: mxs: ..." for patches in the series,
because it's not changing arch/arm/ part but mmc, spi and clk, and
it's not going to go through arm-soc tree (we could do it, but I'm
afraid that Grant and Chris would hardly agree).  So the best way to
go is, giving a proper subsystem prefix on individual patch, collecting
ACKs from Chris and Mike Turquette, and then asking Grant to have the
whole series go via spi tree.

On Sat, Jun 23, 2012 at 08:43:47PM +0200, Marek Vasut wrote:
> Move the definitions into separate file so separate SPI driver can be
> implemented. The SSP controller in MXS can act both as a MMC host and
> as a SPI host.
> 
> Based on previous attempt by:
> Fabio Estevam <fabio.estevam@freescale.com>
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chris Ball <cjb@laptop.org>
> Cc: Detlev Zundel <dzu@denx.de>
> CC: Dong Aisheng <b29396@freescale.com>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Linux ARM kernel <linux-arm-kernel@lists.infradead.org>
> Cc: Rob Herring <rob.herring@calxeda.com>
> CC: Shawn Guo <shawn.guo@linaro.org>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Wolfgang Denk <wd@denx.de>
> ---
>  drivers/mmc/host/mxs-mmc.c  |   87 ++--------------------------------
>  include/linux/spi/mxs-spi.h |  109 +++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 112 insertions(+), 84 deletions(-)
>  create mode 100644 include/linux/spi/mxs-spi.h

-- 
Regards,
Shawn