[PATCH v3 0/5] Enable SPI flash support on da850-evm DT kernel

[PATCH v3 0/5] Enable SPI flash support on da850-evm DT kernel

[Manjunathappa, Prakash]

Patch enables support for m25p64 SPI flash support on
da850-EVM.

Testing information:
da850-evm comes with partitions specified in DT blob.
Able to mount/umount and create/delete files on filesystem partition.

Depends on below patch in spi-next branch of git://git.secretlab.ca/git/linux-2.6.git.
"spi/davinci: add OF support for the spi controller"

Applies on top of v3.9/dt-2 branch of linux_davinci tree:
git://gitorious.org/linux-davinci/linux-davinci.git

Since v2:
Fix compatible property DT naming convention.

Since v1:
Look for m25p64 instead of m25p80 flash chip and correct partition information.
Dropped below accepted patch:
"spi/davinci: fix module build error"
Considered below missed out patch:
spi/davinci: add DT binding documentation

Manjunathappa, Prakash (4):
  spi/davinci: no wildcards in DT compatible property
  ARM: davinci: da850: add SPI1 DT node
  ARM: davinci: da850: override SPI DT node device name
  ARM: davinci: da850-evm: add SPI flash support

Murali Karicheri (1):
  spi/davinci: add DT binding documentation

 .../devicetree/bindings/spi/spi-davinci.txt        |   51 ++++++++++++++++++++
 arch/arm/boot/dts/da850-evm.dts                    |   40 +++++++++++++++
 arch/arm/boot/dts/da850.dtsi                       |   18 +++++++
 arch/arm/mach-davinci/da8xx-dt.c                   |    1 +
 drivers/spi/spi-davinci.c                          |    4 +-
 5 files changed, 112 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-davinci.txt

-- 
1.7.4.1


------------------------------------------------------------------------------
Symantec Endpoint Protection 12 positioned as A LEADER in The Forrester  
Wave(TM): Endpoint Security, Q1 2013 and "remains a good choice" in the  
endpoint security space. For insight on selecting the right partner to 
tackle endpoint security challenges, access the full report. 
http://p.sf.net/sfu/symantec-dev2dev

[PATCH v3 1/5] spi/davinci: no wildcards in DT compatible property

[Manjunathappa, Prakash]

Follow DT naming convention for compatible property of the blob.
Use first chip name that introduced the specific version of the
device.

Signed-off-by: Manjunathappa, Prakash <prakash.pm-l0cyMroinI0@public.gmane.org>
---
New patch in this series.

 drivers/spi/spi-davinci.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c
index b30064b..07517c0 100644
--- a/drivers/spi/spi-davinci.c
+++ b/drivers/spi/spi-davinci.c
@@ -763,10 +763,10 @@ rx_dma_failed:
 #if defined(CONFIG_OF)
 static const struct of_device_id davinci_spi_of_match[] = {
 	{
-		.compatible = "ti,dm644x-spi",
+		.compatible = "ti,dm6441-spi",
 	},
 	{
-		.compatible = "ti,da8xx-spi",
+		.compatible = "ti,da830-spi",
 		.data = (void *)SPI_VERSION_2,
 	},
 	{ },
-- 
1.7.4.1


------------------------------------------------------------------------------
Symantec Endpoint Protection 12 positioned as A LEADER in The Forrester  
Wave(TM): Endpoint Security, Q1 2013 and "remains a good choice" in the  
endpoint security space. For insight on selecting the right partner to 
tackle endpoint security challenges, access the full report. 
http://p.sf.net/sfu/symantec-dev2dev

[PATCH v3 2/5] spi/davinci: add DT binding documentation

[Manjunathappa, Prakash]

From: Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>

Get back missed out binding documentation submitted along
with below patch:
"spi/davinci: add OF support for the spi controller"

[prakash.pm-l0cyMroinI0@public.gmane.org: Follow DT naming convention for compatible property]
Signed-off-by: Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>
Reviewed-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Signed-off-by: Manjunathappa, Prakash <prakash.pm-l0cyMroinI0@public.gmane.org>
---
 .../devicetree/bindings/spi/spi-davinci.txt        |   51 ++++++++++++++++++++
 1 files changed, 51 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-davinci.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt
new file mode 100644
index 0000000..75ad9ac
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt
@@ -0,0 +1,51 @@
+Davinci SPI controller device bindings
+
+Required properties:
+- #address-cells: number of cells required to define a chip select
+	address on the SPI bus. Should be set to 1.
+- #size-cells: should be zero.
+- compatible:
+	- "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
+	- "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
+- reg: Offset and length of SPI controller register space
+- num-cs: Number of chip selects
+- ti,davinci-spi-intr-line: interrupt line used to connect the SPI
+	IP to the interrupt controller withn the SoC. Possible values
+	are 0 and 1. Manual says one of the two possible interrupt
+	lines can be tied to the interrupt controller. Set this
+	based on a specifc SoC configuration.
+- interrupts: interrupt number mapped to CPU.
+- clocks: spi clk phandle
+
+Example of a NOR flash slave device (n25q032) connected to DaVinci
+SPI controller device over the SPI bus.
+
+spi0:spi@20BF0000 {
+	#address-cells	 = <1>;
+	#size-cells	 = <0>;
+	compatible	 = "ti,dm6446-spi";
+	reg	 = <0x20BF0000 0x1000>;
+	num-cs	 = <4>;
+	ti,davinci-spi-intr-line	= <0>;
+	interrupts	 = <338>;
+	clocks	 = <&clkspi>;
+
+	flash: n25q032@0 {
+	 #address-cells = <1>;
+	 #size-cells = <1>;
+	 compatible = "st,m25p32";
+	 spi-max-frequency = <25000000>;
+	 reg = <0>;
+
+	 partition@0 {
+	 label = "u-boot-spl";
+	 reg = <0x0 0x80000>;
+	 read-only;
+	 };
+
+	 partition@1 {
+	 label = "test";
+	 reg = <0x80000 0x380000>;
+	 };
+	};
+};
-- 
1.7.4.1


------------------------------------------------------------------------------
Symantec Endpoint Protection 12 positioned as A LEADER in The Forrester  
Wave(TM): Endpoint Security, Q1 2013 and "remains a good choice" in the  
endpoint security space. For insight on selecting the right partner to 
tackle endpoint security challenges, access the full report. 
http://p.sf.net/sfu/symantec-dev2dev

Re: [PATCH v3 2/5] spi/davinci: add DT binding documentation

[Sekhar Nori]

On 3/12/2013 1:40 PM, Manjunathappa, Prakash wrote:
> From: Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>
> 
> Get back missed out binding documentation submitted along
> with below patch:
> "spi/davinci: add OF support for the spi controller"

This is not really the correct description of this patch. Years later
its mostly irrelevant that binding documentation did not get applied
along with the actual usage.

> 
> [prakash.pm-l0cyMroinI0@public.gmane.org: Follow DT naming convention for compatible property]
> Signed-off-by: Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>
> Reviewed-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
> Signed-off-by: Manjunathappa, Prakash <prakash.pm-l0cyMroinI0@public.gmane.org>
> ---
>  .../devicetree/bindings/spi/spi-davinci.txt        |   51 ++++++++++++++++++++
>  1 files changed, 51 insertions(+), 0 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/spi/spi-davinci.txt
> 
> diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt
> new file mode 100644
> index 0000000..75ad9ac
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt
> @@ -0,0 +1,51 @@
> +Davinci SPI controller device bindings
> +
> +Required properties:
> +- #address-cells: number of cells required to define a chip select
> +	address on the SPI bus. Should be set to 1.
> +- #size-cells: should be zero.
> +- compatible:
> +	- "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
> +	- "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
> +- reg: Offset and length of SPI controller register space
> +- num-cs: Number of chip selects
> +- ti,davinci-spi-intr-line: interrupt line used to connect the SPI
> +	IP to the interrupt controller withn the SoC. Possible values
> +	are 0 and 1. Manual says one of the two possible interrupt
> +	lines can be tied to the interrupt controller. Set this
> +	based on a specifc SoC configuration.
> +- interrupts: interrupt number mapped to CPU.
> +- clocks: spi clk phandle
> +
> +Example of a NOR flash slave device (n25q032) connected to DaVinci
> +SPI controller device over the SPI bus.
> +
> +spi0:spi@20BF0000 {
> +	#address-cells	 = <1>;
> +	#size-cells	 = <0>;
> +	compatible	 = "ti,dm6446-spi";
> +	reg	 = <0x20BF0000 0x1000>;
> +	num-cs	 = <4>;
> +	ti,davinci-spi-intr-line	= <0>;
> +	interrupts	 = <338>;
> +	clocks	 = <&clkspi>;
> +
> +	flash: n25q032@0 {
> +	 #address-cells = <1>;
> +	 #size-cells = <1>;
> +	 compatible = "st,m25p32";
> +	 spi-max-frequency = <25000000>;
> +	 reg = <0>;
> +
> +	 partition@0 {
> +	 label = "u-boot-spl";
> +	 reg = <0x0 0x80000>;
> +	 read-only;
> +	 };
> +
> +	 partition@1 {
> +	 label = "test";
> +	 reg = <0x80000 0x380000>;
> +	 };
> +	};

Looks like the tabs were messed up when you took Murali's patch.

Thanks,
Sekhar

RE: [PATCH v3 2/5] spi/davinci: add DT binding documentation

[Manjunathappa, Prakash]

Hi Sekhar,

On Thu, Mar 14, 2013 at 14:46:54, Nori, Sekhar wrote:
> On 3/12/2013 1:40 PM, Manjunathappa, Prakash wrote:
> > From: Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>
> > 
> > Get back missed out binding documentation submitted along
> > with below patch:
> > "spi/davinci: add OF support for the spi controller"
> 
> This is not really the correct description of this patch. Years later
> its mostly irrelevant that binding documentation did not get applied
> along with the actual usage.
> 

Agreed, I will change the commit message. This could have been below
scissors lines

> > 
> > [prakash.pm-l0cyMroinI0@public.gmane.org: Follow DT naming convention for compatible property]
> > Signed-off-by: Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>
> > Reviewed-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
> > Signed-off-by: Manjunathappa, Prakash <prakash.pm-l0cyMroinI0@public.gmane.org>
> > ---
> >  .../devicetree/bindings/spi/spi-davinci.txt        |   51 ++++++++++++++++++++
> >  1 files changed, 51 insertions(+), 0 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/spi/spi-davinci.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt
> > new file mode 100644
> > index 0000000..75ad9ac
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt
> > @@ -0,0 +1,51 @@
> > +Davinci SPI controller device bindings
> > +
> > +Required properties:
> > +- #address-cells: number of cells required to define a chip select
> > +	address on the SPI bus. Should be set to 1.
> > +- #size-cells: should be zero.
> > +- compatible:
> > +	- "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
> > +	- "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
> > +- reg: Offset and length of SPI controller register space
> > +- num-cs: Number of chip selects
> > +- ti,davinci-spi-intr-line: interrupt line used to connect the SPI
> > +	IP to the interrupt controller withn the SoC. Possible values
> > +	are 0 and 1. Manual says one of the two possible interrupt
> > +	lines can be tied to the interrupt controller. Set this
> > +	based on a specifc SoC configuration.
> > +- interrupts: interrupt number mapped to CPU.
> > +- clocks: spi clk phandle
> > +
> > +Example of a NOR flash slave device (n25q032) connected to DaVinci
> > +SPI controller device over the SPI bus.
> > +
> > +spi0:spi@20BF0000 {
> > +	#address-cells	 = <1>;
> > +	#size-cells	 = <0>;
> > +	compatible	 = "ti,dm6446-spi";
> > +	reg	 = <0x20BF0000 0x1000>;
> > +	num-cs	 = <4>;
> > +	ti,davinci-spi-intr-line	= <0>;
> > +	interrupts	 = <338>;
> > +	clocks	 = <&clkspi>;
> > +
> > +	flash: n25q032@0 {
> > +	 #address-cells = <1>;
> > +	 #size-cells = <1>;
> > +	 compatible = "st,m25p32";
> > +	 spi-max-frequency = <25000000>;
> > +	 reg = <0>;
> > +
> > +	 partition@0 {
> > +	 label = "u-boot-spl";
> > +	 reg = <0x0 0x80000>;
> > +	 read-only;
> > +	 };
> > +
> > +	 partition@1 {
> > +	 label = "test";
> > +	 reg = <0x80000 0x380000>;
> > +	 };
> > +	};
> 
> Looks like the tabs were messed up when you took Murali's patch.
> 

Ok I will fix this.

Thanks,
Prakash

[PATCH v3 3/5] ARM: davinci: da850: add SPI1 DT node

[Manjunathappa, Prakash]

Patch adds SPI1 DT node along with pinmux data.

Signed-off-by: Manjunathappa, Prakash <prakash.pm-l0cyMroinI0@public.gmane.org>
---
 arch/arm/boot/dts/da850.dtsi |   18 ++++++++++++++++++
 1 files changed, 18 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 3ec1bda..327fb06 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -62,6 +62,14 @@
 					0x10 0x00002200 0x0000ff00
 				>;
 			};
+			spi1_pins: pinmux_spi_pins {
+				pinctrl-single,bits = <
+					/* SIMO, SOMI, ENA,
+					 * CLK, CS[0], CS[1]
+					 */
+					0x14 0x00111111 0x00ffffff
+				>;
+			};
 		};
 		serial0: serial@1c42000 {
 			compatible = "ns16550a";
@@ -107,6 +115,16 @@
 			reg = <0x21000 0x1000>;
 			status = "disabled";
 		};
+		spi1: spi@1f0e000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "ti,da830-spi";
+			reg = <0x30e000 0x1000>;
+			num-cs = <4>;
+			ti,davinci-spi-intr-line = <1>;
+			interrupts = <56>;
+			status = "disabled";
+		};
 	};
 	nand_cs3@62000000 {
 		compatible = "ti,davinci-nand";
-- 
1.7.4.1


------------------------------------------------------------------------------
Symantec Endpoint Protection 12 positioned as A LEADER in The Forrester  
Wave(TM): Endpoint Security, Q1 2013 and "remains a good choice" in the  
endpoint security space. For insight on selecting the right partner to 
tackle endpoint security challenges, access the full report. 
http://p.sf.net/sfu/symantec-dev2dev

[PATCH v3 4/5] ARM: davinci: da850: override SPI DT node device name

[Manjunathappa, Prakash]

Populate OF_DEV_AUXDATA with desired device name expected by spi-davinci
driver. Without this clk_get of spi-davinci DT driver fails.

Signed-off-by: Manjunathappa, Prakash <prakash.pm-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/da8xx-dt.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 5404e92..e049f07 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -40,6 +40,7 @@ static void __init da8xx_init_irq(void)
 struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
 	OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL),
 	OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "watchdog", NULL),
+	OF_DEV_AUXDATA("ti,da830-spi", 0x01f0e000, "spi_davinci.1", NULL),
 	{}
 };
 
-- 
1.7.4.1


------------------------------------------------------------------------------
Symantec Endpoint Protection 12 positioned as A LEADER in The Forrester  
Wave(TM): Endpoint Security, Q1 2013 and "remains a good choice" in the  
endpoint security space. For insight on selecting the right partner to 
tackle endpoint security challenges, access the full report. 
http://p.sf.net/sfu/symantec-dev2dev

[PATCH v3 5/5] ARM: davinci: da850-evm: add SPI flash support

[Manjunathappa, Prakash]

Enable m25p64 SPI flash support on da850-EVM. Also
add partition information of SPI flash.

Signed-off-by: Manjunathappa, Prakash <prakash.pm-l0cyMroinI0@public.gmane.org>
---
 arch/arm/boot/dts/da850-evm.dts |   40 +++++++++++++++++++++++++++++++++++++++
 1 files changed, 40 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index c359872..fe2bbe7 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -41,6 +41,46 @@
 		wdt: wdt@1c21000 {
 			status = "okay";
 		};
+		spi1: spi@1f0e000 {
+			status = "okay";
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi1_pins>;
+			flash: m25p80@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "m25p64";
+				spi-max-frequency = <30000000>;
+				reg = <0>;
+				partition@0 {
+					label = "U-Boot-SPL";
+					reg = <0x00000000 0x00010000>;
+					read-only;
+				};
+				partition@1 {
+					label = "U-Boot";
+					reg = <0x00010000 0x00080000>;
+					read-only;
+				};
+				partition@2 {
+					label = "U-Boot-Env";
+					reg = <0x00090000 0x00010000>;
+					read-only;
+				};
+				partition@3 {
+					label = "Kernel";
+					reg = <0x000a0000 0x00280000>;
+				};
+				partition@4 {
+					label = "Filesystem";
+					reg = <0x00320000 0x00400000>;
+				};
+				partition@5 {
+					label = "MAC-Address";
+					reg = <0x007f0000 0x00010000>;
+					read-only;
+				};
+			};
+		};
 	};
 	nand_cs3@62000000 {
 		status = "okay";
-- 
1.7.4.1


------------------------------------------------------------------------------
Symantec Endpoint Protection 12 positioned as A LEADER in The Forrester  
Wave(TM): Endpoint Security, Q1 2013 and "remains a good choice" in the  
endpoint security space. For insight on selecting the right partner to 
tackle endpoint security challenges, access the full report. 
http://p.sf.net/sfu/symantec-dev2dev

Re: [PATCH v3 0/5] Enable SPI flash support on da850-evm DT kernel

[Sekhar Nori]

On 3/12/2013 1:40 PM, Manjunathappa, Prakash wrote:
> Patch enables support for m25p64 SPI flash support on
> da850-EVM.

This patch set looks good to me except the comments I had on 2/5. I
tested it using SPI flash on DA850 EVM and it worked fine on basic
read/write tests.

Grant,

With your ack I would like to merge the series through DaVinci tree so
its easy to manage the conflicts in DT files.

> 
> Testing information:
> da850-evm comes with partitions specified in DT blob.
> Able to mount/umount and create/delete files on filesystem partition.
> 
> Depends on below patch in spi-next branch of git://git.secretlab.ca/git/linux-2.6.git.
> "spi/davinci: add OF support for the spi controller"

Prakash, there is no need to mention this dependency. The patch is
already in mainline.

Thanks,
Sekhar

RE: [PATCH v3 0/5] Enable SPI flash support on da850-evm DT kernel

[Manjunathappa, Prakash]

On Thu, Mar 14, 2013 at 15:54:26, Nori, Sekhar wrote:
> On 3/12/2013 1:40 PM, Manjunathappa, Prakash wrote:
> > Patch enables support for m25p64 SPI flash support on
> > da850-EVM.
> 
> This patch set looks good to me except the comments I had on 2/5. I
> tested it using SPI flash on DA850 EVM and it worked fine on basic
> read/write tests.
> 

Thanks I will add your Reviewed-by.

> Grant,
> 
> With your ack I would like to merge the series through DaVinci tree so
> its easy to manage the conflicts in DT files.
> 
> > 
> > Testing information:
> > da850-evm comes with partitions specified in DT blob.
> > Able to mount/umount and create/delete files on filesystem partition.
> > 
> > Depends on below patch in spi-next branch of git://git.secretlab.ca/git/linux-2.6.git.
> > "spi/davinci: add OF support for the spi controller"
> 
> Prakash, there is no need to mention this dependency. The patch is
> already in mainline.
> 

Yes, I mentioned it here as my patches were based on linux-davinci: v3.9/dt-2 branch.
Will rebase my next versions on davinci/master.

Thanks,
Prakash
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