From: Huang Shijie <b32955@freescale.com>
To: <dwmw2@infradead.org>
Cc: <computersforpeace@gmail.com>, <angus.clark@st.com>,
<lee.jones@linaro.org>, <marex@denx.de>, <pekon@ti.com>,
<sourav.poddar@ti.com>, <broonie@linaro.org>,
<linux-mtd@lists.infradead.org>, <linux-spi@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-doc@vger.kernel.org>, <b44548@freescale.com>,
<b18965@freescale.com>, <shawn.guo@linaro.org>,
Huang Shijie <b32955@freescale.com>
Subject: [PATCH v3 2/7] mtd: spi-nor: add the basic data structures
Date: Mon, 16 Dec 2013 16:58:45 +0800 [thread overview]
Message-ID: <1387184330-14448-3-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1387184330-14448-1-git-send-email-b32955@freescale.com>
The spi_nor{} is cloned from the m25p{}.
The spi_nor{} can be used by both the m25p80 and spi-nor controller.
We also add the spi_nor_xfer_cfg{} which can be used by the two
fundamental primitives: read_xfer/write_xfer.
1) the hooks for spi_nor{}:
@prepare/unpreare: used to do some work before or after the
read/write/erase/lock/unlock.
@read_xfer/write_xfer: We can use these two hooks to code all
the following hooks if the driver tries to implement them
by itself.
@read_reg: used to read the registers, such as read status register,
read configure register.
@write_reg: used to write the registers, such as write enable,
erase sector.
@read_id: read out the ID info.
@wait_till_ready: wait till the NOR becomes ready.
@read: read out the data from the NOR.
@write: write data to the NOR.
@erase: erase a sector of the NOR.
2) Add a new field sst_write_second for the SST NOR write.
Signed-off-by: Huang Shijie <b32955@freescale.com>
---
include/linux/mtd/spi-nor.h | 108 +++++++++++++++++++++++++++++++++++++++++++
1 files changed, 108 insertions(+), 0 deletions(-)
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index ab2ea1e..83ca63d 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -50,4 +50,112 @@
/* Configuration Register bits. */
#define CR_QUAD_EN_SPAN 0x2 /* Spansion Quad I/O */
+enum read_mode {
+ SPI_NOR_NORMAL = 0,
+ SPI_NOR_FAST,
+ SPI_NOR_QUAD,
+};
+
+/*
+ * struct spi_nor_xfer_cfg - Structure for defining a Serial Flash transfer
+ * @wren: command for "Write Enable", or 0x00 for not required
+ * @cmd: command for operation
+ * @cmd_pins: number of pins to send @cmd (1, 2, 4)
+ * @addr: address for operation
+ * @addr_pins: number of pins to send @addr (1, 2, 4)
+ * @addr_width: number of address bytes (3,4, or 0 for address not required)
+ * @mode: mode data
+ * @mode_pins: number of pins to send @mode (1, 2, 4)
+ * @mode_cycles: number of mode cycles (0 for mode not required)
+ * @dummy_cycles: number of dummy cycles (0 for dummy not required)
+ */
+struct spi_nor_xfer_cfg {
+ u8 wren;
+ u8 cmd;
+ u8 cmd_pins;
+ u32 addr;
+ u8 addr_pins;
+ u8 addr_width;
+ u8 mode;
+ u8 mode_pins;
+ u8 mode_cycles;
+ u8 dummy_cycles;
+};
+
+#define SPI_NOR_MAX_CMD_SIZE 8
+enum spi_nor_ops {
+ SPI_NOR_OPS_READ = 0,
+ SPI_NOR_OPS_WRITE,
+ SPI_NOR_OPS_ERASE,
+ SPI_NOR_OPS_LOCK,
+ SPI_NOR_OPS_UNLOCK,
+};
+
+struct spi_nor {
+ struct mtd_info *mtd;
+ struct mutex lock;
+
+ /* pointer to a spi device */
+ struct device *dev;
+ u32 page_size;
+ u8 addr_width;
+ u8 erase_opcode;
+ u8 read_opcode;
+ u8 read_dummy;
+ u8 program_opcode;
+ enum read_mode flash_read;
+ bool sst_write_second;
+ struct spi_nor_xfer_cfg cfg;
+
+ /* for write_reg */
+ u8 cmd_buf[SPI_NOR_MAX_CMD_SIZE];
+
+ /*
+ * Do some work before or after we run these operations:
+ * read/write/erese/lock/unlock
+ */
+ int (*prepare)(struct spi_nor *nor, enum spi_nor_ops ops);
+ void (*unprepare)(struct spi_nor *nor, enum spi_nor_ops ops);
+
+ /*
+ * The two fundamental primitives, you can use them to implement
+ * all the other hooks, except the prepare/unprepare.
+ */
+ int (*read_xfer)(struct spi_nor *nor, struct spi_nor_xfer_cfg *cfg,
+ u8 *buf, size_t len);
+ int (*write_xfer)(struct spi_nor *nor, struct spi_nor_xfer_cfg *cfg,
+ u8 *buf, size_t len);
+
+ /*
+ * The two hooks are used to read/write SPI NOR register, such as
+ * read status register, write status register.
+ */
+ int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
+ int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len,
+ int write_enable);
+
+ /*
+ * The hook for reading out the ID, the spi-nor controller drivers
+ * can fill it with its own implementation if the default
+ * could not meet its requirement.
+ */
+ const struct spi_device_id *(*read_id)(struct spi_nor *nor);
+
+ /*
+ * The hook for "Wait till ready", some spi-nor controller drivers
+ * may fill it with its own implementation.
+ */
+ int (*wait_till_ready)(struct spi_nor *nor);
+
+ /* write */
+ void (*write)(struct spi_nor *nor, loff_t to,
+ size_t len, size_t *retlen, const u_char *buf);
+ /* read */
+ int (*read)(struct spi_nor *nor, loff_t from,
+ size_t len, size_t *retlen, u_char *buf);
+ /* erase a sector(4K/64K, etc..) */
+ int (*erase)(struct spi_nor *nor, loff_t offs);
+
+ void *priv;
+};
#endif
--
1.7.2.rc3
next prev parent reply other threads:[~2013-12-16 8:58 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-16 8:58 [PATCH v3 0/7] mtd: spi-nor: add a new framework for SPI NOR Huang Shijie
[not found] ` <1387184330-14448-1-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2013-12-16 8:58 ` [PATCH v3 1/7] mtd: spi-nor: copy the SPI NOR commands to a new header file Huang Shijie
[not found] ` <1387184330-14448-2-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2013-12-17 13:01 ` Marek Vasut
[not found] ` <201312171401.56683.marex-ynQEQJNshbs@public.gmane.org>
2013-12-17 14:12 ` Huang Shijie
2013-12-16 8:58 ` [PATCH v3 3/7] mtd: spi-nor: add the framework for SPI NOR Huang Shijie
[not found] ` <1387184330-14448-4-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2013-12-16 18:41 ` Sourav Poddar
[not found] ` <52AF4976.7090305-l0cyMroinI0@public.gmane.org>
2013-12-17 2:56 ` Huang Shijie
[not found] ` <20131217025646.GD12575-Fb7DQEYuewWctlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>
2013-12-17 5:19 ` Sourav Poddar
[not found] ` <52AFDEF7.2080604-l0cyMroinI0@public.gmane.org>
2013-12-17 5:20 ` Huang Shijie
2013-12-17 13:07 ` Marek Vasut
2013-12-16 8:58 ` [PATCH v3 6/7] Documentation: add the binding file for Quadspi driver Huang Shijie
2013-12-17 13:10 ` Marek Vasut
[not found] ` <201312171410.05423.marex-ynQEQJNshbs@public.gmane.org>
2013-12-17 13:36 ` thomas.langer-th3ZBGNqt+7QT0dZR+AlfA
2013-12-17 15:10 ` Marek Vasut
2013-12-18 15:30 ` Gerhard Sittig
[not found] ` <20131218153029.GF8064-kDjWylLy9wD0K7fsECOQyeGNnDKD8DIp@public.gmane.org>
2013-12-18 16:03 ` Huang Shijie
2013-12-18 18:21 ` Gerhard Sittig
2013-12-16 8:58 ` [PATCH v3 7/7] mtd: spi-nor: Add Freescale QuadSpi driver Huang Shijie
2013-12-17 13:16 ` Marek Vasut
[not found] ` <201312171416.18560.marex-ynQEQJNshbs@public.gmane.org>
2013-12-17 14:24 ` Huang Shijie
2013-12-16 8:58 ` Huang Shijie [this message]
[not found] ` <1387184330-14448-3-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2013-12-17 13:05 ` [PATCH v3 2/7] mtd: spi-nor: add the basic data structures Marek Vasut
2013-12-17 13:49 ` Huang Shijie
[not found] ` <20131217134923.GA1220-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-12-17 15:16 ` Marek Vasut
2013-12-17 16:00 ` Huang Shijie
2013-12-16 8:58 ` [PATCH v3 4/7] mtd: m25p80: use the SPI nor framework Huang Shijie
2013-12-16 8:58 ` [PATCH v3 5/7] mtd: spi-nor: add a helper to find the spi_device_id Huang Shijie
2013-12-17 4:08 ` [PATCH v3 0/7] mtd: spi-nor: add a new framework for SPI NOR Gupta, Pekon
[not found] ` <20980858CB6D3A4BAE95CA194937D5E73EA56ADC-yXqyApvAXouIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
2013-12-17 4:02 ` Huang Shijie
2013-12-17 5:00 ` Gupta, Pekon
[not found] ` <20980858CB6D3A4BAE95CA194937D5E73EA56B3A-yXqyApvAXouIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
2013-12-17 4:57 ` Huang Shijie
[not found] ` <20131217045752.GA15761-Fb7DQEYuewWctlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>
2013-12-17 5:45 ` Gupta, Pekon
[not found] ` <20980858CB6D3A4BAE95CA194937D5E73EA56B8A-yXqyApvAXouIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
2013-12-17 5:26 ` Huang Shijie
2013-12-17 6:07 ` Shawn Guo
2013-12-17 7:17 ` Gupta, Pekon
2013-12-17 7:56 ` Shawn Guo
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