[PATCH v2, resend for stable 1/1] spi: dw-mid: clear BUSY flag fist and test other one

[PATCH v2, resend for stable 1/1] spi: dw-mid: clear BUSY flag fist and test other one

[Andy Shevchenko]

The logic of DMA completion is broken now since test_and_clear_bit() never
returns the other bit is set. It means condition are always false and we have
spi_finalize_current_transfer() called per each DMA completion which is wrong.

The patch fixes logic by clearing BUSY bit first and then check for the other
one.

Fixes: 30c8eb52cc4a (spi: dw-mid: split rx and tx callbacks when DMA)
Signed-off-by: Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
---
 drivers/spi/spi-dw-mid.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c
index 3ce39d1..4f8c798 100644
--- a/drivers/spi/spi-dw-mid.c
+++ b/drivers/spi/spi-dw-mid.c
@@ -108,7 +108,8 @@ static void dw_spi_dma_tx_done(void *arg)
 {
 	struct dw_spi *dws = arg;
 
-	if (test_and_clear_bit(TX_BUSY, &dws->dma_chan_busy) & BIT(RX_BUSY))
+	clear_bit(TX_BUSY, &dws->dma_chan_busy);
+	if (test_bit(RX_BUSY, &dws->dma_chan_busy))
 		return;
 	dw_spi_xfer_done(dws);
 }
@@ -156,7 +157,8 @@ static void dw_spi_dma_rx_done(void *arg)
 {
 	struct dw_spi *dws = arg;
 
-	if (test_and_clear_bit(RX_BUSY, &dws->dma_chan_busy) & BIT(TX_BUSY))
+	clear_bit(RX_BUSY, &dws->dma_chan_busy);
+	if (test_bit(TX_BUSY, &dws->dma_chan_busy))
 		return;
 	dw_spi_xfer_done(dws);
 }
-- 
2.1.4

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Re: [PATCH v2, resend for stable 1/1] spi: dw-mid: clear BUSY flag fist and test other one

[Mark Brown]

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On Fri, Mar 06, 2015 at 02:42:01PM +0200, Andy Shevchenko wrote:
> The logic of DMA completion is broken now since test_and_clear_bit() never
> returns the other bit is set. It means condition are always false and we have
> spi_finalize_current_transfer() called per each DMA completion which is wrong.

Applied, thanks.  I assume you're also going to resend the other bits if
they're still valid?

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Re: [PATCH v2, resend for stable 1/1] spi: dw-mid: clear BUSY flag fist and test other one

[Andy Shevchenko]

On Sat, Mar 7, 2015 at 1:22 PM, Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> On Fri, Mar 06, 2015 at 02:42:01PM +0200, Andy Shevchenko wrote:
>> The logic of DMA completion is broken now since test_and_clear_bit() never
>> returns the other bit is set. It means condition are always false and we have
>> spi_finalize_current_transfer() called per each DMA completion which is wrong.
>
> Applied, thanks.  I assume you're also going to resend the other bits if
> they're still valid?

Yes, they are.
I will do next working day (On Monday I think ).

-- 
With Best Regards,
Andy Shevchenko
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