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From: <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
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	<baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org>,
	<andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
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	<galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	Andy Shevchenko
	<andriy.shevchenko-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Subject: [RFC/PATCHv2 1/3] spi: dw-spi: Single Register read to clear IRQs
Date: Fri, 6 Mar 2015 17:46:32 -0600	[thread overview]
Message-ID: <1425685594-26595-2-git-send-email-tthayer@opensource.altera.com> (raw)
In-Reply-To: <1425685594-26595-1-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>

From: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>

Instead of clearing the RxU, RxO, and TxO IRQs individually with
3 register reads, a single read of the ICR register will do the
same thing.

Signed-off-by: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
---
 drivers/spi/spi-dw.c |    4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
index 950bc50..c5fa2be 100644
--- a/drivers/spi/spi-dw.c
+++ b/drivers/spi/spi-dw.c
@@ -258,9 +258,7 @@ static irqreturn_t interrupt_transfer(struct dw_spi *dws)
 
 	/* Error handling */
 	if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) {
-		dw_readw(dws, DW_SPI_TXOICR);
-		dw_readw(dws, DW_SPI_RXOICR);
-		dw_readw(dws, DW_SPI_RXUICR);
+		dw_readw(dws, DW_SPI_ICR);
 		int_error_stop(dws, "interrupt_transfer: fifo overrun/underrun");
 		return IRQ_HANDLED;
 	}
-- 
1.7.9.5

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  parent reply	other threads:[~2015-03-06 23:46 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-06 23:46 [RFC/PATCHv2 0/3] spi: spi-dw: Select 16b or 32b register access tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
     [not found] ` <1425685594-26595-1-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-03-06 23:46   ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx [this message]
2015-03-07 19:46     ` [RFC/PATCHv2 1/3] spi: dw-spi: Single Register read to clear IRQs Andy Shevchenko
2015-03-09 18:43     ` Mark Brown
2015-03-06 23:46   ` [RFC/PATCHv2 2/3] dt-binding: spi: spi-dw: Select 16b or 32b access for Designware SPI tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2015-03-07 19:58     ` Andy Shevchenko
2015-03-09 18:11       ` Thor Thayer
     [not found]         ` <54FDE250.3050705-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-03-09 18:19           ` Mark Brown
     [not found]             ` <20150309181936.GU28806-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2015-03-09 18:25               ` Thor Thayer
2015-03-06 23:46   ` [RFC/PATCHv2 3/3] spi: dw-spi: Pointers select 16b vs. 32b DesignWare access tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
     [not found]     ` <1425685594-26595-4-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-03-07 19:52       ` Andy Shevchenko
2015-03-09 18:01         ` Thor Thayer
     [not found]           ` <54FDDFE6.8010109-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-03-09 18:54             ` Andy Shevchenko
     [not found]               ` <CAHp75Vf6dgobzZyJxu8eiqGgC7FRrwLCmyMf5Agk6S3jHDj4bw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-03-09 19:47                 ` Thor Thayer
2015-03-09 20:02                   ` Andy Shevchenko
     [not found]                     ` <CAHp75VcmNOaiyRNLFzQT7nKS6piZzpYSoS785J86rKtNXx6KNg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-03-10 20:34                       ` Thor Thayer
2015-03-10 20:40                         ` Mark Brown
     [not found]                         ` <54FF556A.3020408-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-03-10 20:44                           ` Andy Shevchenko
2015-03-10 22:22                             ` Thor Thayer
     [not found]                               ` <54FF6E91.1010704-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-03-11 10:27                                 ` Andy Shevchenko

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