From: Gao Pan <pandy.gao-3arQi8VN3Tc@public.gmane.org>
To: <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: <linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
<pandy.gao-3arQi8VN3Tc@public.gmane.org>,
<frank.li-3arQi8VN3Tc@public.gmane.org>,
<fugang.duan-3arQi8VN3Tc@public.gmane.org>
Subject: [Patch V1 2/2] imx: spi: read lpspi tx/rx fifo size in probe()
Date: Mon, 28 Nov 2016 11:03:00 +0800 [thread overview]
Message-ID: <1480302180-15550-2-git-send-email-pandy.gao@nxp.com> (raw)
In-Reply-To: <1480302180-15550-1-git-send-email-pandy.gao-3arQi8VN3Tc@public.gmane.org>
The lpspi tx/rx fifo size is a read only parameter resides
lpspi Parameter Register. It's better to read lpspi tx/rx
fifo size in probe().
Signed-off-by: Gao Pan <pandy.gao-3arQi8VN3Tc@public.gmane.org>
---
drivers/spi/spi-fsl-lpspi.c | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c
index 47a97ad..71eca6e 100644
--- a/drivers/spi/spi-fsl-lpspi.c
+++ b/drivers/spi/spi-fsl-lpspi.c
@@ -236,15 +236,9 @@ static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi,
static void fsl_lpspi_set_watermark(struct fsl_lpspi_data *fsl_lpspi)
{
- u8 txwatermark, rxwatermark;
u32 temp;
- temp = readl(fsl_lpspi->base + IMX7ULP_PARAM);
- fsl_lpspi->txfifosize = 1 << (temp & 0x0f);
- fsl_lpspi->rxfifosize = 1 << ((temp >> 8) & 0x0f);
- rxwatermark = fsl_lpspi->txfifosize >> 1;
- txwatermark = fsl_lpspi->rxfifosize >> 1;
- temp = txwatermark | rxwatermark << 16;
+ temp = fsl_lpspi->txfifosize >> 1 | (fsl_lpspi->rxfifosize >> 1) << 16;
writel(temp, fsl_lpspi->base + IMX7ULP_FCR);
@@ -427,6 +421,7 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
struct spi_master *master;
struct resource *res;
int ret, irq;
+ u32 temp;
master = spi_alloc_master(&pdev->dev, sizeof(struct fsl_lpspi_data));
if (!master)
@@ -476,6 +471,18 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
goto out_master_put;
}
+ ret = clk_prepare_enable(fsl_lpspi->clk);
+ if (ret) {
+ dev_err(&pdev->dev, "can't enable lpspi clock, ret=%d\n", ret);
+ goto out_master_put;
+ }
+
+ temp = readl(fsl_lpspi->base + IMX7ULP_PARAM);
+ fsl_lpspi->txfifosize = 1 << (temp & 0x0f);
+ fsl_lpspi->rxfifosize = 1 << ((temp >> 8) & 0x0f);
+
+ clk_disable_unprepare(fsl_lpspi->clk);
+
ret = devm_spi_register_master(&pdev->dev, master);
if (ret < 0) {
dev_err(&pdev->dev, "spi_register_master error.\n");
--
1.9.1
--
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next prev parent reply other threads:[~2016-11-28 3:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-28 3:02 [Patch V1 1/2] spi: imx: use wait_for_completion_timeout() while waiting transfer done Gao Pan
[not found] ` <1480302180-15550-1-git-send-email-pandy.gao-3arQi8VN3Tc@public.gmane.org>
2016-11-28 3:03 ` Gao Pan [this message]
[not found] ` <1480302180-15550-2-git-send-email-pandy.gao-3arQi8VN3Tc@public.gmane.org>
2016-11-30 17:55 ` [Patch V1 2/2] imx: spi: read lpspi tx/rx fifo size in probe() Mark Brown
[not found] ` <20161130175544.rdsl3wahswxewvyb-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2016-12-01 1:49 ` Pandy Gao
2016-11-30 18:08 ` Applied "spi: fsl-lpspi: read lpspi tx/rx fifo size in probe()" to the spi tree Mark Brown
2016-11-30 18:08 ` Applied "spi: fsl-lpspi: use wait_for_completion_timeout() while waiting transfer done" " Mark Brown
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