From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yogesh Gaur Subject: [PATCH v3 2/5] dt-bindings: spi: add binding file for NXP FlexSPI controller Date: Fri, 21 Sep 2018 15:52:00 +0530 Message-ID: <1537525323-20730-3-git-send-email-yogeshnarayan.gaur@nxp.com> References: <1537525323-20730-1-git-send-email-yogeshnarayan.gaur@nxp.com> Mime-Version: 1.0 Content-Type: text/plain Cc: robh@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org, computersforpeace@gmail.com, frieder.schrempf@exceet.de, linux-kernel@vger.kernel.org, Yogesh Gaur To: linux-mtd@lists.infradead.org, boris.brezillon@bootlin.com, marek.vasut@gmail.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org Return-path: In-Reply-To: <1537525323-20730-1-git-send-email-yogeshnarayan.gaur@nxp.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: linux-spi.vger.kernel.org Add binding file for NXP FlexSPI controller Signed-off-by: Yogesh Gaur --- Changes for v3: - None Changes for v2: - Incorporated Rob review comments. .../devicetree/bindings/spi/spi-nxp-fspi.txt | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt new file mode 100644 index 0000000..94b5203 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt @@ -0,0 +1,42 @@ +* NXP Flex Serial Peripheral Interface (FSPI) + +Required properties: + - compatible : Should be "nxp,lx2160a-fspi" + - reg : First contains the register location and length, + Second contains the memory mapping address and length + - reg-names : Should contain the resource reg names: + - fspi_base: configuration register address space + - fspi_mmap: memory mapped address space + - interrupts : Should contain the interrupt for the device + +Optional properties: + - big-endian : See common-properties.txt. + +Required SPI slave node properties: + - reg : There are two buses (A and B) with two chip selects each. + This encodes to which bus and CS the flash is connected: + - <0>: Bus A, CS 0 + - <1>: Bus A, CS 1 + - <2>: Bus B, CS 0 + - <3>: Bus B, CS 1 + +Example showing the usage of two SPI NOR slave devices on bus A: + +fspi@0: flexspi@20c0000 { + compatible = "nxp,lx2160a-fspi"; + reg = <0x0 0x20c0000 0x0 0x10000>, <0x0 0x20000000 0x0 0x10000000>; + reg-names = "fspi_base", "fspi_mmap"; + interrupts = <0 25 0x4>; /* Level high type */ + clocks = <&clockgen 4 3>, <&clockgen 4 3>; + clock-names = "fspi_en", "fspi"; + + flash@0: mt35xu512aba@0 { + reg = <0>; + .... + }; + + flash@1: mt35xu512aba@1 { + reg = <1>; + .... + }; +}; -- 2.7.4