From: haibo.chen@nxp.com
To: ashish.kumar@nxp.com, yogeshgaur.83@gmail.com, broonie@kernel.org
Cc: linux-spi@vger.kernel.org, linux-imx@nxp.com, haibo.chen@nxp.com
Subject: [PATCH 2/4] spi: spi-nxp-fspi: change the default lut index
Date: Fri, 20 Aug 2021 15:44:01 +0800 [thread overview]
Message-ID: <1629445443-10300-2-git-send-email-haibo.chen@nxp.com> (raw)
In-Reply-To: <1629445443-10300-1-git-send-email-haibo.chen@nxp.com>
From: Haibo Chen <haibo.chen@nxp.com>
The fspi dynamic lut use the last lut for all IPS operations, the
imx8ulp only supports 15 luts, so change the last lut index from
31 to 15.
Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
drivers/spi/spi-nxp-fspi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 1eecf20f1dab..a764eb475aed 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -63,9 +63,9 @@
/*
* The driver only uses one single LUT entry, that is updated on
* each call of exec_op(). Index 0 is preset at boot with a basic
- * read operation, so let's use the last entry (31).
+ * read operation, so let's use the last entry (15).
*/
-#define SEQID_LUT 31
+#define SEQID_LUT 15
/* Registers used by the driver */
#define FSPI_MCR0 0x00
--
2.17.1
next prev parent reply other threads:[~2021-08-20 8:06 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-20 7:44 [PATCH 1/4] spi: spi-nxp-fspi: enable runtime pm for fspi haibo.chen
2021-08-20 7:44 ` haibo.chen [this message]
2021-08-20 8:48 ` [EXT] [PATCH 2/4] spi: spi-nxp-fspi: change the default lut index Kuldeep Singh
2021-08-20 9:54 ` Bough Chen
2021-08-20 7:44 ` [PATCH 3/4] spi: spi-nxp-fspi: add DDR mode support haibo.chen
2021-08-31 10:41 ` [EXT] " Kuldeep Singh
2021-09-01 8:05 ` Bough Chen
2021-09-01 8:21 ` Kuldeep Singh
2021-08-20 7:44 ` [PATCH 4/4] spi: spi-nxp-fspi: add function to select sample clock source for flash reading haibo.chen
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