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From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: spi-devel-general@lists.sourceforge.net, russ.gorby@intel.com,
	grant.likely@secretlab.ca, linux-kernel@vger.kernel.org
Subject: [PATCH 2/8] intel_mid_ssp_spi: Re-introduce quirks fields
Date: Wed, 09 Feb 2011 10:07:30 +0000	[thread overview]
Message-ID: <20110209100713.555.65955.stgit@bob.linux.org.uk> (raw)
In-Reply-To: <20110209100231.555.90520.stgit@bob.linux.org.uk>

From: Alan Cox <alan@linux.intel.com>

This adds the quirks field to the driver and the flags. We don't yet
implement any of them so we don't confuse the driver.

Signed-off-by: Alan Cox <alan@linux.intel.com>
---

 drivers/spi/intel_mid_ssp_spi.c |   11 ++++++++++-
 1 files changed, 10 insertions(+), 1 deletions(-)


diff --git a/drivers/spi/intel_mid_ssp_spi.c b/drivers/spi/intel_mid_ssp_spi.c
index 19c62bc..f201edd 100644
--- a/drivers/spi/intel_mid_ssp_spi.c
+++ b/drivers/spi/intel_mid_ssp_spi.c
@@ -125,6 +125,15 @@ struct driver_data {
 	/* SPI framework hookup */
 	struct spi_master *master;
 
+	/* Chip specific quirks */
+	int quirks;
+#define QUIRKS_PLATFORM_MRST		1
+#define QUIRKS_SRAM_ADDITIONAL_CPY	2
+#define QUIRKS_USE_PM_QOS		4
+#define QUIRKS_BIT_BANGING		8
+#define QUIRKS_SPI_SLAVE_CLOCK_MODE	16
+#define QUIRKS_PLATFORM_MDFL		32
+
 	/* SSP register addresses */
 	unsigned long paddr;
 	void __iomem *ioaddr;
@@ -137,7 +146,6 @@ struct driver_data {
 	u32 clear_sr;
 	u32 mask_sr;
 
-
 	/* Current message transfer state info */
 	struct tasklet_struct poll_transfer;
 	struct spi_message *cur_msg;
@@ -1163,6 +1171,7 @@ static int intel_mid_ssp_spi_probe(struct pci_dev *pdev,
 	}
 
 	drv_data = spi_master_get_devdata(master);
+	drv_data->quirks = ent->driver_data;
 	drv_data->master = master;
 	drv_data->pdev = pdev;
 	drv_data->pwrstate = PWRSTATE_ON;

  parent reply	other threads:[~2011-02-09 10:07 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-02-09 10:06 [PATCH 0/8] Intel MID SSP SPI merged driver Alan Cox
2011-02-09 10:07 ` [PATCH 1/8] Intel SPI master controller driver for the Medfield platform Alan Cox
2011-02-15  5:19   ` Grant Likely
2011-02-09 10:07 ` Alan Cox [this message]
2011-02-15  5:21   ` [PATCH 2/8] intel_mid_ssp_spi: Re-introduce quirks fields Grant Likely
2011-02-09 10:08 ` [PATCH 3/8] intel_mid_ssp_spi: Implement the MRST quirk Alan Cox
2011-02-09 10:08 ` [PATCH 4/8] intel_mid_ssp_spi: Add the uglies needed for Moorestown master mode Alan Cox
2011-02-09 10:08 ` [PATCH 5/8] intel_mid_ssp_spi: Add chip definitions Alan Cox
2011-02-09 10:09 ` [PATCH 6/8] intel_mid_ssp_spi: Add the QoS quirk for slave mode Alan Cox
2011-02-09 10:09 ` [PATCH 7/8] intel_mid_ssp_spi: Bounce data through the Langwell SRAM when needed Alan Cox
2011-02-09 10:09 ` [PATCH 8/8] intel_mid_ssp_spi: Implement slave side quirk Alan Cox

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