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From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: spi-devel-general@lists.sourceforge.net, russ.gorby@intel.com,
	grant.likely@secretlab.ca, linux-kernel@vger.kernel.org
Subject: [PATCH 3/8] intel_mid_ssp_spi: Implement the MRST quirk
Date: Wed, 09 Feb 2011 10:08:03 +0000	[thread overview]
Message-ID: <20110209100741.555.63933.stgit@bob.linux.org.uk> (raw)
In-Reply-To: <20110209100231.555.90520.stgit@bob.linux.org.uk>

From: Alan Cox <alan@linux.intel.com>

This quirk simply changes the ID we use to find the DMA controller. Rename
the define and select a different ID IFF the MRST quirk is set

Signed-off-by: Alan Cox <alan@linux.intel.com>
---

 drivers/spi/intel_mid_ssp_spi.c |   12 ++++++++----
 1 files changed, 8 insertions(+), 4 deletions(-)


diff --git a/drivers/spi/intel_mid_ssp_spi.c b/drivers/spi/intel_mid_ssp_spi.c
index f201edd..a7548e7 100644
--- a/drivers/spi/intel_mid_ssp_spi.c
+++ b/drivers/spi/intel_mid_ssp_spi.c
@@ -35,7 +35,8 @@
 
 #define DRIVER_NAME		"intel_mid_ssp_spi"
 #define PCI_DMAC_MAXDI		2047
-#define PCI_DMAC_ID		0x0827
+#define PCI_MDFL_DMAC_ID	0x0827
+#define PCI_MRST_DMAC_ID	0x0814
 /* PM QoS define */
 #define MIN_EXIT_LATENCY	20
 
@@ -463,15 +464,18 @@ static void intel_mid_ssp_spi_dma_init(struct driver_data *drv_data)
 {
 	struct intel_mid_dma_slave *rxs, *txs;
 	dma_cap_mask_t mask;
+	u16 id = PCI_MDFL_DMAC_ID;
 
 	if (drv_data->dma_inited)
 		return;
 
-	drv_data->dmac1 = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DMAC_ID,
+	if (drv_data->quirks & QUIRKS_PLATFORM_MRST)
+		id = PCI_MRST_DMAC_ID;
+
+	drv_data->dmac1 = pci_get_device(PCI_VENDOR_ID_INTEL, id,
 					 NULL);
 	if (!drv_data->dmac1) {
-		dev_warn(&drv_data->pdev->dev, "Can't find DMAC %x",
-			 PCI_DMAC_ID);
+		dev_warn(&drv_data->pdev->dev, "Can't find DMAC %x", id);
 		return;
 	}
 

  parent reply	other threads:[~2011-02-09 10:08 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-02-09 10:06 [PATCH 0/8] Intel MID SSP SPI merged driver Alan Cox
2011-02-09 10:07 ` [PATCH 1/8] Intel SPI master controller driver for the Medfield platform Alan Cox
2011-02-15  5:19   ` Grant Likely
2011-02-09 10:07 ` [PATCH 2/8] intel_mid_ssp_spi: Re-introduce quirks fields Alan Cox
2011-02-15  5:21   ` Grant Likely
2011-02-09 10:08 ` Alan Cox [this message]
2011-02-09 10:08 ` [PATCH 4/8] intel_mid_ssp_spi: Add the uglies needed for Moorestown master mode Alan Cox
2011-02-09 10:08 ` [PATCH 5/8] intel_mid_ssp_spi: Add chip definitions Alan Cox
2011-02-09 10:09 ` [PATCH 6/8] intel_mid_ssp_spi: Add the QoS quirk for slave mode Alan Cox
2011-02-09 10:09 ` [PATCH 7/8] intel_mid_ssp_spi: Bounce data through the Langwell SRAM when needed Alan Cox
2011-02-09 10:09 ` [PATCH 8/8] intel_mid_ssp_spi: Implement slave side quirk Alan Cox

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