dw_spi CS control/transfer modes

[Jamie Iles <jamie-wmLquQDDieKakBO8gow8eQ@public.gmane.org>]

Hi,

I have a platform with a DesignWare SSI and I'm trying to use the dw_spi 
block using a GPIO for the chip select to workaround the problem of CS 
changing and the device losing state (we have a SPI flash attached), and 
I've found that using interrupt driven transfers, reading the SPI flash 
results in very few interrupts from the controller and a sluggish system 
(and no data from the flash).

However, I've found that removing the conditional transfer mode setting 
(effectively reverting commit 052dc7c45 [spi/dw_spi: conditional 
transfer mode changes]) allows everything to work fine by keeping the 
transfer mode to transmit+receive.

Does anyone have any ideas on the best way to fix this?  That code must 
have been added for a reason so perhaps it's just a quirk on our 
platform, but I'd be keen to know in what ways it's been tested before - 
afaict, no other in-tree platforms are using dw_spi with their own 
cs_control so it's difficult to know if perhaps these are all doing 
polled mode transfers.

Thanks,

Jamie

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