* [PATCH 2/4] spi-topcliff-pch: Fix issue for transmitting over 4KByte @ 2011-12-09 4:13 Tomoya MORINAGA [not found] ` <1323404009-3476-1-git-send-email-tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 0 siblings, 1 reply; 6+ messages in thread From: Tomoya MORINAGA @ 2011-12-09 4:13 UTC (permalink / raw) To: Grant Likely, spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f, linux-kernel-u79uwXL29TY76Z2rM5mHXA Cc: qi.wang-ral2JQCrhuEAvxtiuMwx3w, Tomoya MORINAGA, yong.y.wang-ral2JQCrhuEAvxtiuMwx3w, kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w, joel.clark-ral2JQCrhuEAvxtiuMwx3w Currently, when spi-topcliff-pch receives transmit request over 4KByte, this driver can't process correctly. This driver needs to divide the data into 4Kbyte unit. This patch fixes the issue. Signed-off-by: Tomoya MORINAGA <tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- drivers/spi/spi-topcliff-pch.c | 66 +++++++++++++++++++++++++++++++++------- 1 files changed, 55 insertions(+), 11 deletions(-) diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c index fcd9462..7339765 100644 --- a/drivers/spi/spi-topcliff-pch.c +++ b/drivers/spi/spi-topcliff-pch.c @@ -194,6 +194,7 @@ struct pch_spi_data { struct pch_spi_dma_ctrl dma; int use_dma; u8 irq_reg_sts; + int save_total_len; }; /** @@ -819,11 +820,13 @@ static void pch_spi_copy_rx_data_for_dma(struct pch_spi_data *data, int bpw) rx_dma_buf = data->dma.rx_buf_virt; for (j = 0; j < data->bpw_len; j++) *rx_buf++ = *rx_dma_buf++ & 0xFF; + data->cur_trans->rx_buf = rx_buf; } else { rx_sbuf = data->cur_trans->rx_buf; rx_dma_sbuf = data->dma.rx_buf_virt; for (j = 0; j < data->bpw_len; j++) *rx_sbuf++ = *rx_dma_sbuf++; + data->cur_trans->rx_buf = rx_sbuf; } } @@ -849,6 +852,9 @@ static int pch_spi_start_transfer(struct pch_spi_data *data) rtn = wait_event_interruptible_timeout(data->wait, data->transfer_complete, msecs_to_jiffies(2 * HZ)); + if (!rtn) + dev_err(&data->master->dev, + "%s wait-event timeout\n", __func__); dma_sync_sg_for_cpu(&data->master->dev, dma->sg_rx_p, dma->nent, DMA_FROM_DEVICE); @@ -985,6 +991,7 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw) int i; int size; int rem; + int head; unsigned long flags; struct pch_spi_dma_ctrl *dma; @@ -1013,6 +1020,11 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw) } data->bpw_len = data->cur_trans->len / (*bpw / 8); + if (data->bpw_len > PCH_BUF_SIZE) { + data->bpw_len = PCH_BUF_SIZE; + data->cur_trans->len -= PCH_BUF_SIZE; + } + /* copy Tx Data */ if (data->cur_trans->tx_buf != NULL) { if (*bpw == 8) { @@ -1027,10 +1039,17 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw) *tx_dma_sbuf++ = *tx_sbuf++; } } + + /* Calculate Rx parameter for DMA transmitting */ if (data->bpw_len > PCH_DMA_TRANS_SIZE) { - num = data->bpw_len / PCH_DMA_TRANS_SIZE + 1; + if (data->bpw_len % PCH_DMA_TRANS_SIZE) { + num = data->bpw_len / PCH_DMA_TRANS_SIZE + 1; + rem = data->bpw_len % PCH_DMA_TRANS_SIZE; + } else { + num = data->bpw_len / PCH_DMA_TRANS_SIZE; + rem = PCH_DMA_TRANS_SIZE; + } size = PCH_DMA_TRANS_SIZE; - rem = data->bpw_len % PCH_DMA_TRANS_SIZE; } else { num = 1; size = data->bpw_len; @@ -1090,15 +1109,23 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw) dma->nent = num; dma->desc_rx = desc_rx; - /* TX */ - if (data->bpw_len > PCH_DMA_TRANS_SIZE) { - num = data->bpw_len / PCH_DMA_TRANS_SIZE; + /* Calculate Tx parameter for DMA transmitting */ + if (data->bpw_len > PCH_MAX_FIFO_DEPTH) { + head = PCH_MAX_FIFO_DEPTH - PCH_DMA_TRANS_SIZE; + if (data->bpw_len % PCH_DMA_TRANS_SIZE > 4) { + num = data->bpw_len / PCH_DMA_TRANS_SIZE + 1; + rem = data->bpw_len % PCH_DMA_TRANS_SIZE - head; + } else { + num = data->bpw_len / PCH_DMA_TRANS_SIZE; + rem = data->bpw_len % PCH_DMA_TRANS_SIZE + + PCH_DMA_TRANS_SIZE - head; + } size = PCH_DMA_TRANS_SIZE; - rem = 16; } else { num = 1; size = data->bpw_len; rem = data->bpw_len; + head = 0; } dma->sg_tx_p = kzalloc(sizeof(struct scatterlist)*num, GFP_ATOMIC); @@ -1108,11 +1135,17 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw) for (i = 0; i < num; i++, sg++) { if (i == 0) { sg->offset = 0; + sg_set_page(sg, virt_to_page(dma->tx_buf_virt), size + head, + sg->offset); + sg_dma_len(sg) = size + head; + } else if (i == (num - 1)) { + sg->offset = head + size * i; + sg->offset = sg->offset * (*bpw / 8); sg_set_page(sg, virt_to_page(dma->tx_buf_virt), rem, sg->offset); sg_dma_len(sg) = rem; } else { - sg->offset = rem + size * (i - 1); + sg->offset = head + size * i; sg->offset = sg->offset * (*bpw / 8); sg_set_page(sg, virt_to_page(dma->tx_buf_virt), size, sg->offset); @@ -1200,6 +1233,7 @@ static void pch_spi_process_messages(struct work_struct *pwork) data->current_msg->spi->bits_per_word); pch_spi_writereg(data->master, PCH_SSNXCR, SSN_NO_CONTROL); do { + int cnt; /* If we are already processing a message get the next transfer structure from the message otherwise retrieve the 1st transfer request from the message. */ @@ -1219,11 +1253,20 @@ static void pch_spi_process_messages(struct work_struct *pwork) } spin_unlock(&data->lock); + if (!data->cur_trans->len) + goto out; + cnt = (data->cur_trans->len - 1) / PCH_BUF_SIZE + 1; + data->save_total_len = data->cur_trans->len; if (data->use_dma) { - pch_spi_handle_dma(data, &bpw); - if (!pch_spi_start_transfer(data)) - goto out; - pch_spi_copy_rx_data_for_dma(data, bpw); + int i; + char *save_rx_buf = data->cur_trans->rx_buf; + for (i = 0; i < cnt; i ++) { + pch_spi_handle_dma(data, &bpw); + if (!pch_spi_start_transfer(data)) + goto out; + pch_spi_copy_rx_data_for_dma(data, bpw); + } + data->cur_trans->rx_buf = save_rx_buf; } else { pch_spi_set_tx(data, &bpw); pch_spi_set_ir(data); @@ -1234,6 +1277,7 @@ static void pch_spi_process_messages(struct work_struct *pwork) data->pkt_tx_buff = NULL; } /* increment message count */ + data->cur_trans->len = data->save_total_len; data->current_msg->actual_length += data->cur_trans->len; dev_dbg(&data->master->dev, -- 1.7.4.4 ------------------------------------------------------------------------------ Cloud Services Checklist: Pricing and Packaging Optimization This white paper is intended to serve as a reference, checklist and point of discussion for anyone considering optimizing the pricing and packaging model of a cloud services business. Read Now! http://www.accelacomm.com/jaw/sfnl/114/51491232/ ^ permalink raw reply related [flat|nested] 6+ messages in thread
[parent not found: <1323404009-3476-1-git-send-email-tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* [PATCH 3/4][RESEND] spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control [not found] ` <1323404009-3476-1-git-send-email-tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2011-12-09 4:13 ` Tomoya MORINAGA [not found] ` <1323404009-3476-2-git-send-email-tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2011-12-09 4:13 ` [PATCH 4/4] spi-topcliff-pch: add recovery processing in case wait-event timeout Tomoya MORINAGA 2012-03-10 3:56 ` [PATCH 2/4] spi-topcliff-pch: Fix issue for transmitting over 4KByte Grant Likely 2 siblings, 1 reply; 6+ messages in thread From: Tomoya MORINAGA @ 2011-12-09 4:13 UTC (permalink / raw) To: Grant Likely, spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f, linux-kernel-u79uwXL29TY76Z2rM5mHXA Cc: qi.wang-ral2JQCrhuEAvxtiuMwx3w, Tomoya MORINAGA, yong.y.wang-ral2JQCrhuEAvxtiuMwx3w, kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w, joel.clark-ral2JQCrhuEAvxtiuMwx3w This patch supports a spi mode setup and bit order setup by IO control. spi mode: mode 0 to mode 3 bit order: LSB first, MSB first Signed-off-by: Tomoya MORINAGA <tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- drivers/spi/spi-topcliff-pch.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c index 7339765..1864555 100644 --- a/drivers/spi/spi-topcliff-pch.c +++ b/drivers/spi/spi-topcliff-pch.c @@ -1430,6 +1430,7 @@ static int __devinit pch_spi_pd_probe(struct platform_device *plat_dev) master->num_chipselect = PCH_MAX_CS; master->setup = pch_spi_setup; master->transfer = pch_spi_transfer; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; data->board_dat = board_dat; data->plat_dev = plat_dev; -- 1.7.4.4 ------------------------------------------------------------------------------ Cloud Services Checklist: Pricing and Packaging Optimization This white paper is intended to serve as a reference, checklist and point of discussion for anyone considering optimizing the pricing and packaging model of a cloud services business. Read Now! http://www.accelacomm.com/jaw/sfnl/114/51491232/ ^ permalink raw reply related [flat|nested] 6+ messages in thread
[parent not found: <1323404009-3476-2-git-send-email-tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH 3/4][RESEND] spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control [not found] ` <1323404009-3476-2-git-send-email-tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2012-03-10 3:57 ` Grant Likely 0 siblings, 0 replies; 6+ messages in thread From: Grant Likely @ 2012-03-10 3:57 UTC (permalink / raw) To: Tomoya MORINAGA, spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f, linux-kernel-u79uwXL29TY76Z2rM5mHXA Cc: qi.wang-ral2JQCrhuEAvxtiuMwx3w, Tomoya MORINAGA, yong.y.wang-ral2JQCrhuEAvxtiuMwx3w, kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w, joel.clark-ral2JQCrhuEAvxtiuMwx3w On Fri, 9 Dec 2011 13:13:28 +0900, Tomoya MORINAGA <tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote: > This patch supports a spi mode setup and bit order setup by IO control. > spi mode: mode 0 to mode 3 > bit order: LSB first, MSB first > > Signed-off-by: Tomoya MORINAGA <tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Applied, thanks. g. > --- > drivers/spi/spi-topcliff-pch.c | 1 + > 1 files changed, 1 insertions(+), 0 deletions(-) > > diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c > index 7339765..1864555 100644 > --- a/drivers/spi/spi-topcliff-pch.c > +++ b/drivers/spi/spi-topcliff-pch.c > @@ -1430,6 +1430,7 @@ static int __devinit pch_spi_pd_probe(struct platform_device *plat_dev) > master->num_chipselect = PCH_MAX_CS; > master->setup = pch_spi_setup; > master->transfer = pch_spi_transfer; > + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; > > data->board_dat = board_dat; > data->plat_dev = plat_dev; > -- > 1.7.4.4 > -- Grant Likely, B.Sc, P.Eng. Secret Lab Technologies,Ltd. ------------------------------------------------------------------------------ Virtualization & Cloud Management Using Capacity Planning Cloud computing makes use of virtualization - but cloud computing also focuses on allowing computing to be delivered as a service. http://www.accelacomm.com/jaw/sfnl/114/51521223/ ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 4/4] spi-topcliff-pch: add recovery processing in case wait-event timeout [not found] ` <1323404009-3476-1-git-send-email-tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2011-12-09 4:13 ` [PATCH 3/4][RESEND] spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control Tomoya MORINAGA @ 2011-12-09 4:13 ` Tomoya MORINAGA 2012-03-10 3:58 ` Grant Likely 2012-03-10 3:56 ` [PATCH 2/4] spi-topcliff-pch: Fix issue for transmitting over 4KByte Grant Likely 2 siblings, 1 reply; 6+ messages in thread From: Tomoya MORINAGA @ 2011-12-09 4:13 UTC (permalink / raw) To: Grant Likely, spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f, linux-kernel-u79uwXL29TY76Z2rM5mHXA Cc: qi.wang-ral2JQCrhuEAvxtiuMwx3w, Tomoya MORINAGA, yong.y.wang-ral2JQCrhuEAvxtiuMwx3w, kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w, joel.clark-ral2JQCrhuEAvxtiuMwx3w Currently, pch_spi_start_transfer failure is not anticipated. This patch adds the processing. Signed-off-by: Tomoya MORINAGA <tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- drivers/spi/spi-topcliff-pch.c | 10 +++++++++- 1 files changed, 9 insertions(+), 1 deletions(-) diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c index 1864555..10b684c 100644 --- a/drivers/spi/spi-topcliff-pch.c +++ b/drivers/spi/spi-topcliff-pch.c @@ -1262,8 +1262,16 @@ static void pch_spi_process_messages(struct work_struct *pwork) char *save_rx_buf = data->cur_trans->rx_buf; for (i = 0; i < cnt; i ++) { pch_spi_handle_dma(data, &bpw); - if (!pch_spi_start_transfer(data)) + if (!pch_spi_start_transfer(data)) { + data->transfer_complete = true; + data->current_msg->status = -EIO; + data->current_msg->complete + (data->current_msg->context); + data->bcurrent_msg_processing = false; + data->current_msg = NULL; + data->cur_trans = NULL; goto out; + } pch_spi_copy_rx_data_for_dma(data, bpw); } data->cur_trans->rx_buf = save_rx_buf; -- 1.7.4.4 ------------------------------------------------------------------------------ Cloud Services Checklist: Pricing and Packaging Optimization This white paper is intended to serve as a reference, checklist and point of discussion for anyone considering optimizing the pricing and packaging model of a cloud services business. Read Now! http://www.accelacomm.com/jaw/sfnl/114/51491232/ ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 4/4] spi-topcliff-pch: add recovery processing in case wait-event timeout 2011-12-09 4:13 ` [PATCH 4/4] spi-topcliff-pch: add recovery processing in case wait-event timeout Tomoya MORINAGA @ 2012-03-10 3:58 ` Grant Likely 0 siblings, 0 replies; 6+ messages in thread From: Grant Likely @ 2012-03-10 3:58 UTC (permalink / raw) To: Tomoya MORINAGA, spi-devel-general, linux-kernel Cc: qi.wang, yong.y.wang, joel.clark, kok.howg.ewe, Wolfram Sang, Tomoya MORINAGA On Fri, 9 Dec 2011 13:13:29 +0900, Tomoya MORINAGA <tomoya.rohm@gmail.com> wrote: > Currently, pch_spi_start_transfer failure is not anticipated. > This patch adds the processing. > > Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com> Applied, thanks. g. > --- > drivers/spi/spi-topcliff-pch.c | 10 +++++++++- > 1 files changed, 9 insertions(+), 1 deletions(-) > > diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c > index 1864555..10b684c 100644 > --- a/drivers/spi/spi-topcliff-pch.c > +++ b/drivers/spi/spi-topcliff-pch.c > @@ -1262,8 +1262,16 @@ static void pch_spi_process_messages(struct work_struct *pwork) > char *save_rx_buf = data->cur_trans->rx_buf; > for (i = 0; i < cnt; i ++) { > pch_spi_handle_dma(data, &bpw); > - if (!pch_spi_start_transfer(data)) > + if (!pch_spi_start_transfer(data)) { > + data->transfer_complete = true; > + data->current_msg->status = -EIO; > + data->current_msg->complete > + (data->current_msg->context); > + data->bcurrent_msg_processing = false; > + data->current_msg = NULL; > + data->cur_trans = NULL; > goto out; > + } > pch_spi_copy_rx_data_for_dma(data, bpw); > } > data->cur_trans->rx_buf = save_rx_buf; > -- > 1.7.4.4 > -- Grant Likely, B.Sc, P.Eng. Secret Lab Technologies,Ltd. ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/4] spi-topcliff-pch: Fix issue for transmitting over 4KByte [not found] ` <1323404009-3476-1-git-send-email-tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2011-12-09 4:13 ` [PATCH 3/4][RESEND] spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control Tomoya MORINAGA 2011-12-09 4:13 ` [PATCH 4/4] spi-topcliff-pch: add recovery processing in case wait-event timeout Tomoya MORINAGA @ 2012-03-10 3:56 ` Grant Likely 2 siblings, 0 replies; 6+ messages in thread From: Grant Likely @ 2012-03-10 3:56 UTC (permalink / raw) To: Tomoya MORINAGA, spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f, linux-kernel-u79uwXL29TY76Z2rM5mHXA Cc: qi.wang-ral2JQCrhuEAvxtiuMwx3w, Tomoya MORINAGA, yong.y.wang-ral2JQCrhuEAvxtiuMwx3w, kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w, joel.clark-ral2JQCrhuEAvxtiuMwx3w On Fri, 9 Dec 2011 13:13:27 +0900, Tomoya MORINAGA <tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote: > Currently, when spi-topcliff-pch receives transmit request over 4KByte, > this driver can't process correctly. This driver needs to divide the data > into 4Kbyte unit. > This patch fixes the issue. > > Signed-off-by: Tomoya MORINAGA <tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Applied, thanks. g. ------------------------------------------------------------------------------ Virtualization & Cloud Management Using Capacity Planning Cloud computing makes use of virtualization - but cloud computing also focuses on allowing computing to be delivered as a service. http://www.accelacomm.com/jaw/sfnl/114/51521223/ ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2012-03-10 3:58 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2011-12-09 4:13 [PATCH 2/4] spi-topcliff-pch: Fix issue for transmitting over 4KByte Tomoya MORINAGA [not found] ` <1323404009-3476-1-git-send-email-tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2011-12-09 4:13 ` [PATCH 3/4][RESEND] spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control Tomoya MORINAGA [not found] ` <1323404009-3476-2-git-send-email-tomoya.rohm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2012-03-10 3:57 ` Grant Likely 2011-12-09 4:13 ` [PATCH 4/4] spi-topcliff-pch: add recovery processing in case wait-event timeout Tomoya MORINAGA 2012-03-10 3:58 ` Grant Likely 2012-03-10 3:56 ` [PATCH 2/4] spi-topcliff-pch: Fix issue for transmitting over 4KByte Grant Likely
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).