From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Subject: Re: [PATCH V2 01/12] spi/mxs: Always set LOCK_CS Date: Sun, 14 Apr 2013 20:01:52 +0200 Message-ID: <201304142001.52391.marex@denx.de> References: <1364905195-24286-1-git-send-email-tpiepho@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: Fabio Estevam , spi-devel-general@lists.sourceforge.net, Shawn Guo , linux-arm-kernel@lists.infradead.org To: Trent Piepho Return-path: In-Reply-To: <1364905195-24286-1-git-send-email-tpiepho@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org List-Id: linux-spi.vger.kernel.org Hello Trent, > There are two bits which control the CS line in the CTRL0 register: > LOCK_CS and IGNORE_CRC. The latter would be better named DEASSERT_CS > in SPI mode. > > LOCK_CS keeps CS asserted though the entire transfer. This should > always be set. The DMA code will always set it, explicitly on the > first segment of the first transfer, and then implicitly on all the > rest by never clearing the bit from the value read from the ctrl0 > register. > > The only reason to not set LOCK_CS would be to attempt an altered > protocol where CS pulses between each word. Though don't get your > hopes up if you want to do this, as the hardware doesn't appear to do > this in any sane manner. > > The code can be simplified by just setting LOCK_CS once and then not > needing to deal with it in the PIO and DMA transfer functions. > > Signed-off-by: Trent Piepho > Cc: Marek Vasut > Cc: Fabio Estevam > Cc: Shawn Guo Will we see a V3 of this stuff? I don't want to see this lost. Best regards, Marek Vasut