From: Trent Piepho <tpiepho-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org,
Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>,
Fabio Estevam
<fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
Shawn Guo <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Subject: [PATCH 03/13] spi: spi-mxs: Always clear INGORE_CRC, to keep CS asserted
Date: Tue, 01 Oct 2013 13:14:39 -0700 [thread overview]
Message-ID: <20131001201439.13660.75380.stgit@Graphine> (raw)
In-Reply-To: <20131001201425.13660.72740.stgit@Graphine>
INGORE_CRC, better named DEASSERT_CS, should be cleared on all tranfers
except the last. So instead of only clearing it on the first transfer, we
can just always clear it. It will set on the last transfer.
This removes the only use of the "first" flag in the transfer functions, so
that flag can be then be removed.
Signed-off-by: Trent Piepho <tpiepho-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
Cc: Fabio Estevam <fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Cc: Shawn Guo <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
drivers/spi/spi-mxs.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-mxs.c b/drivers/spi/spi-mxs.c
index 991ee01..e2a9cc2 100644
--- a/drivers/spi/spi-mxs.c
+++ b/drivers/spi/spi-mxs.c
@@ -318,9 +318,8 @@ static int mxs_spi_txrx_pio(struct mxs_spi *spi, int cs,
{
struct mxs_ssp *ssp = &spi->ssp;
- if (*first)
- writel(BM_SSP_CTRL0_IGNORE_CRC,
- ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
+ writel(BM_SSP_CTRL0_IGNORE_CRC,
+ ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
mxs_spi_set_cs(spi, cs);
------------------------------------------------------------------------------
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next prev parent reply other threads:[~2013-10-01 20:14 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-01 20:14 [PATCH 01/13] spi: spi-mxs: Always set LOCK_CS Trent Piepho
2013-10-01 20:14 ` [PATCH 02/13] spi: spi-mxs: Remove mxs_spi_enable and mxs_spi_disable Trent Piepho
2013-10-01 20:14 ` Trent Piepho [this message]
2013-10-01 20:14 ` [PATCH 04/13] spi: spi-mxs: Change flag arguments in txrx functions to bit flags Trent Piepho
2013-10-01 20:14 ` [PATCH 05/13] spi: spi-mxs: Fix extra CS pulses and read mode in multi-transfer messages Trent Piepho
2013-10-01 20:15 ` [PATCH 06/13] spi: spi-mxs: Fix chip select control bits in DMA mode Trent Piepho
2013-10-01 20:15 ` [PATCH 07/13] spi: spi-mxs: Remove full duplex check, spi core already does it Trent Piepho
2013-10-01 20:15 ` [PATCH 08/13] spi: spi-mxs: Remove bogus setting of ssp clk rate field Trent Piepho
2013-10-01 20:15 ` [PATCH 09/13] spi: spi-mxs: Fix race in setup method Trent Piepho
2013-10-01 20:15 ` [PATCH 10/13] spi: spi-mxs: Remove check of spi mode bits Trent Piepho
2013-10-01 20:15 ` [PATCH 11/13] spi: spi-mxs: Clean up setup_transfer function Trent Piepho
2013-10-01 20:15 ` [PATCH 12/13] spi: spi-mxs: Don't set clock for each xfer Trent Piepho
2013-10-01 20:15 ` [PATCH 13/13] spi: spi-mxs: Use u32 instead of uint32_t Trent Piepho
2013-10-03 16:02 ` [PATCH 01/13] spi: spi-mxs: Always set LOCK_CS Marek Vasut
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