Re: [PATCH 0/4] spi: dw: fixes, and manages resources migration

[Gerhard Sittig <gsi-ynQEQJNshbs@public.gmane.org>]

On Thu, Dec 26, 2013 at 09:00 +0200, Baruch Siach wrote:
> 
> I have a few more patches in the queue for adding device tree
> support, gpio chip selects, and generic spi queue, but I'm
> waiting with time until I get a chance to test them properly.

Just some notes on GPIO backed CS lines.  When I recently worked
with them (not in mainline, but in a "non-existing" :) tree which
is why I haven't upstreamed), I learned the following:

With cs-gpios you can have an arbitrary number of CS lines,
regardless of how many internal hardwired CS lines the controller
may have.  Make sure to test setups with high CS numbers as well.

Make sure to test with low CS numbers, too, because cs-gpios can
both extend the number of internally provided CS lines, as well
as "shadow" the internal CS lines.  Internal and external lines
can get mixed in arbitrary ways.

The SPI master driver's code appeared to assume that always in
internal CS is involved, without it the transfer of data was
stuck.  So I had to pick an internal CS trigger in dirty ways
despite of using a GPIO line for CS control, just to "unfreeze"
the data transmission.  You may see a similar issue.

To summarize you may want to consider the following DT spec

  ...
  cs-gpios = <&pio 0>, <0>, <0>, <0>, <&pio 1>;
  ...

and run your tests with SPI slaves on CS0, CS1, and CS4.


virtually yours
Gerhard Sittig
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