Re: [PATCH 0/4] spi: dw: fixes, and manages resources migration

[Baruch Siach <baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org>]

Hi Gerhard,

On Thu, Dec 26, 2013 at 04:42:50PM +0100, Gerhard Sittig wrote:
> On Thu, Dec 26, 2013 at 14:12 +0200, Baruch Siach wrote:
> > 
> > [ ... GPIO controlled CS lines for SPI ... ]
> > 
> > Thanks for the head up. I was considering adding a spi-dw specific "dummy-cs" 
> > property, to be used for cs-gpio numbers that are higher than num-cs.
> 
> Look at it the other way for a moment.  These GPIO backed CS
> lines aren't "dummies", having control over them and having more
> than four of them is not at all exceptional or strange, it's the
> actual motivation for cs-gpios in the first place.  And all of
> these GPIO lines are "real" and useful.
> 
> Try to see the internal CS lines in the hardware of the SPI
> controller as the exception instead. :) These are the ones that
> are rather limited, both in their number and in their behaviour,
> and are of questionable use.  These internal lines of
> uncontrollable behaviour only get used in the absence of a GPIO
> spec for the CS line.

That's what I meant. The "dummy-cs" should be an internal chip-select that 
does not control any slave signal. It is meant to be used only to trigger the 
start of transfer. This is necessary in particular when the number of GPIO 
chip-select lines is higher than the number of internal chip-selects. 
Otherwise, the high bits in the Slave Enable Register are ignored.

baruch

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