From: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Alexander Stein
<alexander.stein-93q1YBGzJSMe9JSWTWOYM3xStJ4P+DSV@public.gmane.org>
Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 1/1] spi: fsl-dspi: Fix CTAR selection
Date: Tue, 4 Nov 2014 10:52:33 +0000 [thread overview]
Message-ID: <20141104105233.GD3815@sirena.org.uk> (raw)
In-Reply-To: <1415089218-2011-1-git-send-email-alexander.stein-93q1YBGzJSMe9JSWTWOYM3xStJ4P+DSV@public.gmane.org>
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On Tue, Nov 04, 2014 at 09:20:18AM +0100, Alexander Stein wrote:
> There are only 4 CTAR registers (CTAR0 - CTAR3) so we can only use the
> lower 2 bits of the chip select to select a CTAR register.
> SPI_PUSHR_CTAS used the lower 3 bits which would result in wrong bit values
> if the chip selects 4/5 are used. For those chip selects SPI_CTAR even
> calculated offsets of non-existing registers.
Applied, thanks.
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prev parent reply other threads:[~2014-11-04 10:52 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-04 8:20 [PATCH 1/1] spi: fsl-dspi: Fix CTAR selection Alexander Stein
[not found] ` <1415089218-2011-1-git-send-email-alexander.stein-93q1YBGzJSMe9JSWTWOYM3xStJ4P+DSV@public.gmane.org>
2014-11-04 10:52 ` Mark Brown [this message]
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