From: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Andy Shevchenko
<andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Subject: Re: [PATCH v1] spi: dw-pci: describe Intel MID controllers better
Date: Wed, 7 Jan 2015 18:01:31 +0000 [thread overview]
Message-ID: <20150107180131.GH2634@sirena.org.uk> (raw)
In-Reply-To: <1420643700-23059-1-git-send-email-andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
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On Wed, Jan 07, 2015 at 05:15:00PM +0200, Andy Shevchenko wrote:
> There are more that one SPI controller on the Intel MID boards. This patch
> describes the status and IDs of them. From now on we also have to care about
> bus number that must be unique per host.
Applied, thanks.
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prev parent reply other threads:[~2015-01-07 18:01 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-07 15:15 [PATCH v1] spi: dw-pci: describe Intel MID controllers better Andy Shevchenko
[not found] ` <1420643700-23059-1-git-send-email-andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2015-01-07 18:01 ` Mark Brown [this message]
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