From: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Sifan Naeem <sifan.naeem-1AXoQHu6uovQT0dZR+AlfA@public.gmane.org>
Subject: Re: [PATCH 4/5] spi: img-spfi: Setup TRANSACTION register before CONTROL register
Date: Wed, 8 Apr 2015 11:36:38 +0100 [thread overview]
Message-ID: <20150408103638.GU6023@sirena.org.uk> (raw)
In-Reply-To: <1428355747-16822-4-git-send-email-abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
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On Mon, Apr 06, 2015 at 02:29:06PM -0700, Andrew Bresticker wrote:
> From: Sifan Naeem <sifan.naeem-1AXoQHu6uovQT0dZR+AlfA@public.gmane.org>
>
> Setting the transfer length in the TRANSACTION register after the
> CONTROL register is programmed causes intermittent timeout issues in
> SPFI transfers when using the SPI framework to control the CS GPIO
> lines. To avoid this issue, set transfer length before programming
> the CONTROL register.
Applied, thanks.
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next prev parent reply other threads:[~2015-04-08 10:36 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-06 21:29 [PATCH 1/5] spi: img-spfi: Limit bit clock to 1/4th of input clock Andrew Bresticker
2015-04-06 21:29 ` [PATCH 2/5] spi: img-spfi: Implement a prepare_message() callback Andrew Bresticker
[not found] ` <1428355747-16822-2-git-send-email-abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2015-04-07 11:18 ` Mark Brown
2015-04-06 21:29 ` [PATCH 3/5] spi: img-spfi: Implement an unprepare_message() callback Andrew Bresticker
[not found] ` <1428355747-16822-3-git-send-email-abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2015-04-07 11:17 ` Mark Brown
2015-04-06 21:29 ` [PATCH 5/5] spi: img-spfi: Control CS lines with GPIO Andrew Bresticker
[not found] ` <1428355747-16822-1-git-send-email-abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2015-04-06 21:29 ` [PATCH 4/5] spi: img-spfi: Setup TRANSACTION register before CONTROL register Andrew Bresticker
2015-04-07 11:23 ` Mark Brown
2015-04-07 17:59 ` Andrew Bresticker
[not found] ` <1428355747-16822-4-git-send-email-abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2015-04-08 10:36 ` Mark Brown [this message]
2015-04-07 11:19 ` [PATCH 1/5] spi: img-spfi: Limit bit clock to 1/4th of input clock Mark Brown
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