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From: Boris Brezillon <boris.brezillon-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
To: Vignesh R <vigneshr-l0cyMroinI0@public.gmane.org>
Cc: "Boris Brezillon"
	<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	"Yogesh Gaur" <yogeshnarayan.gaur-3arQi8VN3Tc@public.gmane.org>,
	"Kamal Dasu" <kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"Richard Weinberger" <richard-/L3Ra7n9ekc@public.gmane.org>,
	"linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"Peter Pan"
	<peterpansjtu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"Marek Vasut"
	<marek.vasut-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"Frieder Schrempf"
	<frieder.schrempf-wPoT/lNZgHizQB+pC5nmwQ@public.gmane.org>,
	"Mark Brown" <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"Cyrille Pitchen"
	<cyrille.pitchen-yU5RGvR974pGWvitb5QawA@public.gmane.org>,
	"Rafał Miłecki" <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>,
	"Brian Norris"
	<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"David Woodhouse" <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
Subject: Re: [RFC PATCH 4/6] spi: ti-qspi: Implement the spi_mem interface
Date: Sat, 17 Feb 2018 22:52:26 +0100	[thread overview]
Message-ID: <20180217225226.3813c1ce@bbrezillon> (raw)
In-Reply-To: <55878296-f1c9-434b-3c7e-e2f03f5824a9-l0cyMroinI0@public.gmane.org>

On Sat, 17 Feb 2018 16:31:48 +0530
Vignesh R <vigneshr-l0cyMroinI0@public.gmane.org> wrote:

> [...]
> >>>>>>       
> >>>>>>> +static const struct spi_controller_mem_ops ti_qspi_mem_ops = {
> >>>>>>> +   .exec_op = ti_qspi_exec_mem_op,        
> >>>>>>
> >>>>>>         .supports_op = ti_qspi_supports_mem_op,
> >>>>>>
> >>>>>> Its required as per spi_controller_check_ops() in Patch 1/6      
> >>>>>       
> >>>>> ->supports_op() is optional, and if it's missing, the core will do the      
> >>>>> regular QuadSPI/DualSPI/SingleSPI check (see spi_mem_supports_op()
> >>>>> implementation).       
> >>>>
> >>>> You might have overlooked spi_controller_check_ops() from Patch 1/6:
> >>>> +static int spi_controller_check_ops(struct spi_controller *ctlr)
> >>>> +{
> >>>> +	/*
> >>>> +	 * The controller can implement only the high-level SPI-memory
> >>>> +	 * operations if it does not support regular SPI transfers.
> >>>> +	 */
> >>>> +	if (ctlr->mem_ops) {
> >>>> +		if (!ctlr->mem_ops->supports_op ||
> >>>> +		    !ctlr->mem_ops->exec_op)
> >>>> +			return -EINVAL;
> >>>> +	} else if (!ctlr->transfer && !ctlr->transfer_one &&
> >>>> +		   !ctlr->transfer_one_message) {
> >>>> +		return -EINVAL;
> >>>> +	}
> >>>> +
> >>>> +	return 0;
> >>>> +}
> >>>> +
> >>>>
> >>>> So if ->supports_op() is not populated by SPI controller driver, then
> >>>> driver probe fails with -EINVAL. This is what I observed on my TI
> >>>> hardware when testing this patch series.    
> >>>
> >>> Correct. Then I should fix spi_controller_check_ops() to allow empty
> >>> ctlr->mem_ops->supports_op.
> >>>     
> >>>>    
> >>>>> This being said, if you think a custom ->supports_op()
> >>>>> implementation is needed for this controller I can add one.
> >>>>>       
> >>>>
> >>>> spi_mem_supports_op() should suffice for now if above issue is fixed.    
> >>>
> >>> Cool. IIUC, you tested the series on a TI SoC. Does it work as
> >>> expected? Do you see any perf regressions?
> >>>     
> 
> No other functional failures or performance issues so far wrt TI QSPI.
> Things look good :)

That's good news. I'll send a v2 addressing the problems you and others
reported soon, but I'd like to have Cyrille's and Mark's feedback first.

BTW, don't hesitate to comment on the interface itself. Do you think
it's missing important features? Do you need more information to better
optimize SPI memory accesses? ...
This truly was an RFC: I'm new to these QSPI/SPI-NOR/SPI-NAND stuff, and
I know you and others already faced various problems and thought about
different solutions to address them. Now is a good time to re-think the
whole thing and design the spi_mem interface in a way that allows us to
better support all these QSPI-memory-oriented controllers.

Regards,

Boris

-- 
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com
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  parent reply	other threads:[~2018-02-17 21:52 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-05 23:21 [RFC PATCH 0/6] spi: Extend the framework to generically support memory devices Boris Brezillon
     [not found] ` <20180205232120.5851-1-boris.brezillon-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
2018-02-05 23:21   ` [RFC PATCH 1/6] spi: Extend the core to ease integration of SPI memory controllers Boris Brezillon
     [not found]     ` <20180205232120.5851-2-boris.brezillon-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
2018-02-06  9:43       ` Maxime Chevallier
2018-02-06 10:25         ` Boris Brezillon
2018-02-06 12:06         ` Mark Brown
2018-02-09 12:52       ` Miquel Raynal
2018-02-11 16:00         ` Boris Brezillon
2018-02-12 11:50       ` Vignesh R
     [not found]         ` <40a44152-e62c-d57e-7646-7699301c29cc-l0cyMroinI0@public.gmane.org>
2018-02-12 12:28           ` Boris Brezillon
2018-02-28  7:51     ` Peter Pan
2018-02-28 12:25       ` Boris Brezillon
2018-03-04 21:15     ` Cyrille Pitchen
2018-03-05  9:00       ` Boris Brezillon
2018-03-05 13:01         ` Cyrille Pitchen
2018-03-05 13:47           ` Boris Brezillon
2018-03-08 14:07             ` Boris Brezillon
2018-02-05 23:21   ` [RFC PATCH 2/6] spi: bcm-qspi: Implement the spi_mem interface Boris Brezillon
2018-02-05 23:21   ` [RFC PATCH 3/6] spi: bcm53xx: " Boris Brezillon
2018-02-05 23:21   ` [RFC PATCH 4/6] spi: ti-qspi: " Boris Brezillon
     [not found]     ` <20180205232120.5851-5-boris.brezillon-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
2018-02-11 15:17       ` Miquel Raynal
2018-02-11 17:18         ` Boris Brezillon
2018-02-12  7:54           ` Miquel Raynal
2018-02-12 11:43       ` Vignesh R
     [not found]         ` <6a9eaaaf-20a6-b332-03d0-9d16e24d0b3d-l0cyMroinI0@public.gmane.org>
2018-02-12 12:31           ` Boris Brezillon
2018-02-12 16:00             ` Vignesh R
     [not found]               ` <67e61203-a2e9-853c-6cda-7226499611c2-l0cyMroinI0@public.gmane.org>
2018-02-12 16:08                 ` Boris Brezillon
2018-02-14 16:25                   ` Vignesh R
     [not found]                     ` <0944fefa-6ef8-a93a-dad6-660044b8ec8e-l0cyMroinI0@public.gmane.org>
2018-02-14 19:09                       ` Boris Brezillon
2018-02-14 20:44                         ` Schrempf Frieder
     [not found]                           ` <561c779b-28b1-ac8a-6b27-46b5ac59344b-wPoT/lNZgHizQB+pC5nmwQ@public.gmane.org>
2018-02-14 21:00                             ` Boris Brezillon
2018-02-15 16:38                               ` Schrempf Frieder
2018-02-17 11:01                         ` Vignesh R
     [not found]                           ` <55878296-f1c9-434b-3c7e-e2f03f5824a9-l0cyMroinI0@public.gmane.org>
2018-02-17 21:52                             ` Boris Brezillon [this message]
2018-02-16 10:25       ` Boris Brezillon
2018-02-05 23:21   ` [RFC PATCH 5/6] mtd: spi-nor: Use the spi_mem_xx() API Boris Brezillon
     [not found]     ` <20180205232120.5851-6-boris.brezillon-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
2018-02-12 11:44       ` Vignesh R
     [not found]         ` <933bd372-8b75-183f-0b03-563cabbbcc68-l0cyMroinI0@public.gmane.org>
2018-02-12 12:32           ` Boris Brezillon
2018-06-11  6:25     ` Yogesh Narayan Gaur
2018-06-11  7:35       ` Boris Brezillon
2018-02-05 23:21   ` [RFC PATCH 6/6] spi: Get rid of the spi_flash_read() API Boris Brezillon
     [not found]     ` <20180205232120.5851-7-boris.brezillon-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
2018-02-16 10:21       ` Vignesh R
     [not found]         ` <674d7b22-a3ac-e812-04db-aa0acb1671b0-l0cyMroinI0@public.gmane.org>
2018-02-16 10:24           ` Boris Brezillon
     [not found] ` <20180219162510.GG32761@sirena.org.uk>
2018-03-04 21:40   ` [RFC PATCH 0/6] spi: Extend the framework to generically support memory devices Cyrille Pitchen

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