Re: Questions about the Freescale/NXP QuadSPI controller

From: Huang Shijie <sjhuang@iluvatar.ai>
To: Lukasz Majewski <lukma@denx.de>
Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>,
	"marek.vasut@gmail.com" <marek.vasut@gmail.com>,
	"richard@nod.at" <richard@nod.at>,
	"broonie@kernel.org" <broonie@kernel.org>,
	"miquel.raynal@bootlin.com" <miquel.raynal@bootlin.com>,
	"linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
	Albert ARIBAUD <albert.aribaud@3adev.fr>,
	Boris Brezillon <boris.brezillon@bootlin.com>,
	Frieder Schrempf <frieder.schrempf@exceet.de>,
	Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	David Wolfe <david.wolfe@nxp.com>,
	Fabio Estevam <fabio.estevam@nxp.com>, Han Xu <han.xu@nxp.com>,
	"computersforpeace@gmail.com" <computersforpeace@gmail.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"dwmw2@infradead.org" <dwmw2@infradead.org>
Subject: Re: Questions about the Freescale/NXP QuadSPI controller
Date: Thu, 20 Sep 2018 09:17:59 +0800	[thread overview]
Message-ID: <20180920011759.GA19040@hsj-Precision-5520> (raw)
In-Reply-To: <20180919130211.3f2e7e3a@jawa>

On Wed, Sep 19, 2018 at 01:02:11PM +0200, Lukasz Majewski wrote:
> Hi Frieder,
> 
> > Hi Lukasz,
> > 
> > On 19.09.2018 00:42, Lukasz Majewski wrote:
> > > Dear All,
> > > 
> > > Maybe I do jump a bit off topic here, but...
> > > 
> > > I've read through the following thread:
> > > https://patchwork.ozlabs.org/patch/939885/
> > > 
> > > And it mentions some issues with reading AHB content (buffers) in
> > > fsl-quadspi.c driver discovered when new QuadSPI driver was
> > > developed.  
> > 
> > The only setup with two chips that is known to be problematic with
> > the new driver, is when both chips are connected to the same bus
> > (e.g. QSPIA) using separate chip selects.
> 
> I'm using QSPI0 controller, with two memories connected to QSPI0_A and
> QSPI0_B lines.
> 
> > 
> > Does your board use this kind of setup, or are the two chips
> > connected two different buses (QSPIA and QSPIB)?
> > 
> > Have you tested the new driver? It would be great to receive some
> > more feedback.
> 
> I will check (test) this new driver. No problem.
> 
> > 
> > > I do have a setup with qspi0 having two SPI memories connected (2x16
> > > MiB), and I'm wondering if anybody has some more info regarding:
> > > 
> > > (What's more is that there is a bug in
> > >   * the "IP Command Read" in the Vybrid.) found here:
> > > https://elixir.bootlin.com/linux/v4.19-rc4/source/drivers/mtd/spi-nor/fsl-quadspi.c#L671
> > > 
> > > I've googled for some errata or known issues for vybryd's QSPI IP
> > > block (vf610) but without luck so far ...  
> > 
> > Unfortunately I don't know the background for this comment.
> 
> The comment was added by some Freescale employee when the driver was
> added to Linux (by Huang - CC'ed).

I was told that there was a hardware bug in the vybryd when we use the "IP Command Read":
    If you use the "IP Command Read", you will not get the correct data.

So I added that comment.

I suggest that do not use the "IP Command Read" for vybryd.

Thanks
Huang Shijie

> 
> > Is your 
> > board using VF610?
> 
> Yes, it uses vf610 (A5 + M4 cores).
> 

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