From: Boris Brezillon <boris.brezillon@bootlin.com>
To: Chuanhua Han <chuanhua.han@nxp.com>
Cc: broonie@kernel.org, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, eha@deif.com
Subject: Re: [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer_bpw function
Date: Fri, 28 Sep 2018 08:44:31 +0200 [thread overview]
Message-ID: <20180928084431.300b7bf9@bbrezillon> (raw)
In-Reply-To: <20180921070628.35153-1-chuanhua.han@nxp.com>
Hi Chuanhua,
On Fri, 21 Sep 2018 15:06:26 +0800
Chuanhua Han <chuanhua.han@nxp.com> wrote:
> Before we add this spi_transfer to the spi_message chain table, we need
> bits_per_word_mask based on spi_control to set the bits_per_word of
> this spi_transfer.
It's not clear to me what you're trying to fix/improve. Can you give
more details on what the problem is?
>
> Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
> ---
> drivers/spi/spi-mem.c | 39 +++++++++++++++++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
> index eb72dba71d83..717e711c0952 100644
> --- a/drivers/spi/spi-mem.c
> +++ b/drivers/spi/spi-mem.c
> @@ -175,6 +175,41 @@ bool spi_mem_supports_op(struct spi_mem *mem, const struct spi_mem_op *op)
> }
> EXPORT_SYMBOL_GPL(spi_mem_supports_op);
>
> +/**
> + * spi_set_xfer_bpw() - Set the bits_per_word for each transfer based on
> + * the bits_per_word_mask of the spi controller
> + * @ctrl: the spi controller
> + * @xfer: the spi transfer
> + *
> + * This function sets the bits_per_word for each transfer based on the spi
> + * controller's bits_per_word_mask to improve the efficiency of spi transport.
> + *
> + * Return: 0 in case of success, a negative error code otherwise.
> + */
> +int spi_set_xfer_bpw(struct spi_controller *ctlr, struct spi_transfer *xfer)
> +{
> + if (!ctlr || !xfer) {
> + dev_err(&ctlr->dev,
> + "Fail to set bits_per_word for spi transfer\n");
> + return -EINVAL;
> + }
> +
> + if (ctlr->bits_per_word_mask) {
> + if (!(xfer->len % 4)) {
> + if (ctlr->bits_per_word_mask & SPI_BPW_MASK(32))
> + xfer->bits_per_word = 32;
> + } else if (!(xfer->len % 2)) {
> + if (ctlr->bits_per_word_mask & SPI_BPW_MASK(16))
> + xfer->bits_per_word = 16;
> + } else {
> + xfer->bits_per_word = 8;
> + }
> + }
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(spi_set_xfer_bpw);
Why is this function placed in spi-mem.c, and more importantly, why is
it exported?
> +
> /**
> * spi_mem_exec_op() - Execute a memory operation
> * @mem: the SPI memory
> @@ -252,6 +287,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
> xfers[xferpos].tx_buf = tmpbuf;
> xfers[xferpos].len = sizeof(op->cmd.opcode);
> xfers[xferpos].tx_nbits = op->cmd.buswidth;
> + spi_set_xfer_bpw(ctlr, &xfers[xferpos]);
It's still unclear why you need to specify a bits_per_word value, but
if this is needed, it's probably something you want to add to spi.c,
when a message is queued.
> spi_message_add_tail(&xfers[xferpos], &msg);
> xferpos++;
> totalxferlen++;
> @@ -266,6 +302,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
> xfers[xferpos].tx_buf = tmpbuf + 1;
> xfers[xferpos].len = op->addr.nbytes;
> xfers[xferpos].tx_nbits = op->addr.buswidth;
> + spi_set_xfer_bpw(ctlr, &xfers[xferpos]);
> spi_message_add_tail(&xfers[xferpos], &msg);
> xferpos++;
> totalxferlen += op->addr.nbytes;
> @@ -276,6 +313,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
> xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
> xfers[xferpos].len = op->dummy.nbytes;
> xfers[xferpos].tx_nbits = op->dummy.buswidth;
> + spi_set_xfer_bpw(ctlr, &xfers[xferpos]);
> spi_message_add_tail(&xfers[xferpos], &msg);
> xferpos++;
> totalxferlen += op->dummy.nbytes;
> @@ -291,6 +329,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
> }
>
> xfers[xferpos].len = op->data.nbytes;
> + spi_set_xfer_bpw(ctlr, &xfers[xferpos]);
> spi_message_add_tail(&xfers[xferpos], &msg);
> xferpos++;
> totalxferlen += op->data.nbytes;
next prev parent reply other threads:[~2018-09-28 6:44 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-21 7:06 [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer_bpw function Chuanhua Han
2018-09-21 7:06 ` [PATCH 2/2] spi: spi-fsl-dspi: Fix support for XSPI transport mode Chuanhua Han
2018-09-28 6:37 ` Chuanhua Han
2018-09-28 6:55 ` Boris Brezillon
2018-09-29 14:56 ` Esben Haabendal
2018-09-29 15:43 ` Boris Brezillon
2018-09-30 2:49 ` Chuanhua Han
2018-09-21 7:06 ` [PATCH] spi: spi-mem: Adjust op len based on message/transfer size limitations Chuanhua Han
2018-09-21 7:15 ` Chuanhua Han
2018-09-28 6:37 ` [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer_bpw function Chuanhua Han
2018-09-28 6:44 ` Boris Brezillon [this message]
2018-09-28 6:59 ` Chuanhua Han
2018-09-28 7:18 ` Boris Brezillon
2018-09-28 7:29 ` Chuanhua Han
2018-09-28 13:26 ` Mark Brown
2018-10-09 9:52 ` Chuanhua Han
2018-10-09 10:05 ` Boris Brezillon
2018-10-09 10:24 ` Chuanhua Han
2018-10-09 11:20 ` Esben Haabendal
2018-10-10 2:42 ` Chuanhua Han
2018-10-10 6:38 ` Esben Haabendal
2018-10-09 10:33 ` Mark Brown
2018-10-09 13:50 ` Esben Haabendal
2018-10-09 10:53 ` Esben Haabendal
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