From: Rob Herring <robh@kernel.org>
To: Ludovic Barre <ludovic.Barre@st.com>
Cc: Mark Brown <broonie@kernel.org>,
Marek Vasut <marek.vasut@gmail.com>,
Boris Brezillon <boris.brezillon@bootlin.com>,
Rob Herring <robh+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
devicetree@vger.kernel.org, Ludovic Barre <ludovic.barre@st.com>
Subject: Re: [PATCH 1/2] dt-bindings: spi: add stm32 qspi controller
Date: Tue, 16 Oct 2018 17:36:31 -0500 [thread overview]
Message-ID: <20181016223631.GA19725@bogus> (raw)
In-Reply-To: <1538725383-19781-2-git-send-email-ludovic.Barre@st.com>
On Fri, 5 Oct 2018 09:43:02 +0200, Ludovic Barre wrote:
> From: Ludovic Barre <ludovic.barre@st.com>
>
> This patch adds the documentation of device tree bindings
> for the STM32 QSPI controller. It is a specialized communication
> interface targeting single, dual or quad SPI Flash memories (NOR/NAND).
>
> Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
> ---
> .../devicetree/bindings/spi/spi-stm32-qspi.txt | 44 ++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/spi/spi-stm32-qspi.txt
>
Reviewed-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2018-10-16 22:36 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-05 7:43 [PATCH 0/2] spi: spi-mem: add stm32 qspi controller Ludovic Barre
2018-10-05 7:43 ` [PATCH 1/2] dt-bindings: spi: " Ludovic Barre
2018-10-16 22:36 ` Rob Herring [this message]
2018-10-19 12:29 ` Applied "dt-bindings: spi: add stm32 qspi controller" to the spi tree Mark Brown
2018-10-05 7:43 ` [PATCH 2/2] spi: spi-mem: add stm32 qspi controller Ludovic Barre
2018-10-05 7:55 ` [Linux-stm32] " Loic PALLARDY
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