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From: Thierry Reding <thierry.reding@gmail.com>
To: "Randolph Maaßen" <gaireg@gaireg.de>
Cc: Laxman Dewangan <ldewangan@nvidia.com>,
	Mark Brown <broonie@kernel.org>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Sowjanya Komatineni <skomatineni@nvidia.com>,
	linux-spi@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] spi: tegra20-slink: change chip select action order
Date: Tue, 26 Mar 2019 15:44:37 +0100	[thread overview]
Message-ID: <20190326144437.GA21654@ulmo> (raw)
In-Reply-To: <20190326143050.26232-1-gaireg@gaireg.de>

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On Tue, Mar 26, 2019 at 03:30:50PM +0100, Randolph Maaßen wrote:
> To transfer via SPI the tegra20-slink driver first sets the command
> register, which contains the chip select value, and after that the
> command2 register, which contains the chip select line. This leads to a
> small spike in the chip selct 0 line between the set of the value and
> the selection of the chip select line.
> 
> This commit changes the order of the register writes so that first the
> chip select line is chosen and then the value is set, removing the
> spike.
> 
> Signed-off-by: Randolph Maaßen <gaireg@gaireg.de>
> ---
>  drivers/spi/spi-tegra20-slink.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)

Looks good to me. Adding Sowjanya who has been looking into SPI
recently.

Thierry

> diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c
> index 1427f343b39a..6d4679126213 100644
> --- a/drivers/spi/spi-tegra20-slink.c
> +++ b/drivers/spi/spi-tegra20-slink.c
> @@ -717,9 +717,6 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
>  	command2 = tspi->command2_reg;
>  	command2 &= ~(SLINK_RXEN | SLINK_TXEN);
>  
> -	tegra_slink_writel(tspi, command, SLINK_COMMAND);
> -	tspi->command_reg = command;
> -
>  	tspi->cur_direction = 0;
>  	if (t->rx_buf) {
>  		command2 |= SLINK_RXEN;
> @@ -729,9 +726,18 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
>  		command2 |= SLINK_TXEN;
>  		tspi->cur_direction |= DATA_DIR_TX;
>  	}
> +
> +	/*
> +	 * Writing to the command2 register bevore the command register prevents
> +	 * a spike in chip_select line 0. This selects the chip_select line
> +	 * before changing the chip_select value.
> +	 */
>  	tegra_slink_writel(tspi, command2, SLINK_COMMAND2);
>  	tspi->command2_reg = command2;
>  
> +	tegra_slink_writel(tspi, command, SLINK_COMMAND);
> +	tspi->command_reg = command;
> +
>  	if (total_fifo_words > SLINK_FIFO_DEPTH)
>  		ret = tegra_slink_start_dma_based_transfer(tspi, t);
>  	else
> -- 
> 2.11.0
> 

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  reply	other threads:[~2019-03-26 14:44 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-26 14:30 [PATCH] spi: tegra20-slink: change chip select action order Randolph Maaßen
2019-03-26 14:44 ` Thierry Reding [this message]
2019-03-26 19:11   ` Sowjanya Komatineni
2019-03-28 16:34 ` Thierry Reding

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