From mboxrd@z Thu Jan 1 00:00:00 1970 From: Miquel Raynal Subject: Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND controller Date: Wed, 19 Jun 2019 10:09:04 +0200 Message-ID: <20190619100904.6b759377@xps13> References: <1555320234-15802-1-git-send-email-masonccyang@mxic.com.tw> <1555320234-15802-3-git-send-email-masonccyang@mxic.com.tw> <20190512151820.4f2dd9da@xps13> <20190520142333.390091d5@xps13> <20190527144250.71908bd9@xps13> <20190617143510.4ded5728@xps13> <20190618081436.5d488320@collabora.com> <20190618092901.3bdd9f61@collabora.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Cc: "Boris Brezillon" , bbrezillon@kernel.org, broonie@kernel.org, christophe.kerello@st.com, computersforpeace@gmail.com, devicetree@vger.kernel.org, dwmw2@infradead.org, geert@linux-m68k.org, juliensu@mxic.com.tw, lee.jones@linaro.org, liang.yang@amlogic.com, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org, marcel.ziswiler@toradex.com, marek.vasut@gmail.com, mark.rutland@arm.com, paul.burton@mips.com, richard@nod.at, robh+dt@kernel.org, stefan@agner.ch, zhengxunli@mxic.com.tw To: masonccyang@mxic.com.tw Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org List-Id: linux-spi.vger.kernel.org Hi Mason, masonccyang@mxic.com.tw wrote on Wed, 19 Jun 2019 16:04:43 +0800: > Hi Boris, > > > > > Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND controller > > > > On Tue, 18 Jun 2019 08:14:36 +0200 > > Boris Brezillon wrote: > > > > > > > > > > > > > > > > > > How to make all #CS keep high for NAND to enter > > > > > > > > low-power standby mode if driver don't use > "legacy.select_chip()" > > > > ? > > > > > > > > > > > > > > See commit 02b4a52604a4 ("mtd: rawnand: Make ->select_chip() > > > > optional > > > > > > > when ->exec_op() is implemented") which states: > > > > > > > > > > > > > > "When [->select_chip() is] not implemented, the core > is > > > > assuming > > > > > > > the CS line is automatically asserted/deasserted by the > driver > > > > > > > ->exec_op() implementation." > > > > > > > > > > > > > > Of course, the above is right only when the controller driver > > > > > supports > > > > > > > the ->exec_op() interface. > > > > > > > > > > > > Currently, it seems that we will get the incorrect data and > error > > > > > > operation due to CS in error toggling if CS line is controlled > in > > > > > > ->exec_op(). > > > > Oh, and please provide the modifications you added on top of this patch. > > Right now we're speculating on what you've done which is definitely not > > an efficient way to debug this sort of issues. > We really need to see the datasheet of the NAND chip which has a problem and how this LPM mode is advertized to understand what the chip expects and eventually how to work-around it. > The patch is to add in beginning of ->exec_op() to control CS# low and > before return from ->exec_op() to control CS# High. > i.e,. > static in mxic_nand_exec_op( ) > { > cs_to_low(); > > > > cs_to_high(); > return; > } > > But for nand_onfi_detect(), > it calls nand_read_param_page_op() and then nand_read_data_op(). > mxic_nand_exec_op() be called twice for nand_onfi_detect() Yes, this is expected and usually chips don't care. > and > driver will get incorrect ONFI parameter table data from > nand_read_data_op(). > Thanks, Miquèl