[PATCH v3 5/8] dt-bindings: snps,dw-apb-ssi: Add sparx5 support, plus snps,rx-sample-delay-ns property

[Lars Povlsen <lars.povlsen@microchip.com>]

This has the following changes for the snps,dw-apb-ss DT bindings:

- Add "microchip,sparx5-spi" as the compatible for the Sparx5 SoC
  controller

- Add the property "mux-controls" for the above compatible string

- Add the property "snps,rx-sample-delay-ns" for SPI slaves

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
---
 .../bindings/spi/snps,dw-apb-ssi.yaml         | 28 +++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
index c62cbe79f00dd..9d9208391fae3 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
@@ -36,6 +36,8 @@ properties:
               - mscc,ocelot-spi
               - mscc,jaguar2-spi
           - const: snps,dw-apb-ssi
+      - description: Microchip Sparx5 SoC SPI Controller
+        const: microchip,sparx5-spi
       - description: Amazon Alpine SPI Controller
         const: amazon,alpine-dw-apb-ssi
       - description: Renesas RZ/N1 SPI Controller
@@ -93,6 +95,19 @@ properties:
       - const: tx
       - const: rx

+if:
+  properties:
+    compatible:
+      contains:
+        const: microchip,sparx5-spi
+
+then:
+  properties:
+    mux-controls:
+      description: A mux controller node for selecting SPI bus interface.
+      maxItems: 1
+      $ref: '/schemas/types.yaml#/definitions/phandle'
+
 patternProperties:
   "^.*@[0-9a-f]+$":
     type: object
@@ -107,6 +122,14 @@ patternProperties:
       spi-tx-bus-width:
         const: 1

+      snps,rx-sample-delay-ns:
+        description: SPI Rx sample delay offset, unit is nanoseconds.
+          The delay from the default sample time before the actual
+          sample of the rxd input signal occurs. The "rx_sample_delay"
+          is an optional feature of the designware controller, and the
+          upper limit is also subject to controller configuration.
+        $ref: /schemas/types.yaml#/definitions/uint32
+
 unevaluatedProperties: false

 required:
@@ -129,5 +152,10 @@ examples:
       num-cs = <2>;
       cs-gpios = <&gpio0 13 0>,
                  <&gpio0 14 0>;
+      spi-flash@1 {
+        compatible = "spi-nand";
+        reg = <1>;
+        snps,rx-sample-delay-ns = <7>;
+      };
     };
 ...
--
2.27.0