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Date:   Wed, 26 May 2021 10:32:40 +0200
From:   Miquel Raynal <miquel.raynal@bootlin.com>
To:     Mark Brown <broonie@kernel.org>
Cc:     patrice.chotard@foss.st.com, Vignesh Raghavendra <vigneshr@ti.com>,
        Boris Brezillon <boris.brezillon@collabora.com>,
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        christophe.kerello@foss.st.com
Subject: Re: [PATCH v5 0/3] MTD: spinand: Add spi_mem_poll_status() support
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        <20210519191836.GH4224@sirena.org.uk>
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Hi Mark,

Mark Brown <broonie@kernel.org> wrote on Wed, 19 May 2021 20:18:36
+0100:

> On Tue, May 18, 2021 at 06:27:51PM +0200, patrice.chotard@foss.st.com wrote:
> > From: Patrice Chotard <patrice.chotard@foss.st.com>
> > 
> > This series adds support for the spi_mem_poll_status() spinand
> > interface.
> > Some QSPI controllers allows to poll automatically memory 
> > status during operations (erase, read or write). This allows to 
> > offload the CPU for this task.
> > STM32 QSPI is supporting this feature, driver update are also
> > part of this series.  
> 
> The SPI bits look good to me - should we merge via MTD or SPI?

I don't expect any conflicts with the current changes in MTD, I just
acked the SPI-NAND patch, you may take it through SPI.

Thanks,
Miquèl